e213223c9b
Some of the files have both me and Jared McNeill and he gave me permission to remove it from his files too.
605 lines
16 KiB
C
605 lines
16 KiB
C
/*-
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* Copyright (c) 2017 Emmanuel Vadot <manu@freebsd.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __AW_CLK_H__
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#define __AW_CLK_H__
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/*
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Allwinner clocks formula :
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PLLs:
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(24MHz*N*K)/(M*P)
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(24MHz*N)/(M*P)
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(24MHz*N*2)/M
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(24MHz*N)/M
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(24MHz*N*K)/M
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(24MHz*N*K/2)
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(24MHz*N)/M
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(24MHz*N*K/2)
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(24MHz*N)/M
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Periph clocks:
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Clock Source/Divider N/Divider M
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Clock Source/Divider N/Divider M/2
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Clock Source*N/(Divider M+1)/(Divider P+1)
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*/
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struct aw_clk_init {
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const char *name;
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const char *parent_name;
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uint64_t default_freq;
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bool enable;
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};
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#define AW_CLK_HAS_GATE 0x0001
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#define AW_CLK_HAS_LOCK 0x0002
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#define AW_CLK_HAS_MUX 0x0004
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#define AW_CLK_REPARENT 0x0008
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#define AW_CLK_SCALE_CHANGE 0x0010
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#define AW_CLK_HAS_UPDATE 0x0040
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#define AW_CLK_HAS_PREDIV 0x0080
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#define AW_CLK_SET_PARENT 0x0100
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#define AW_CLK_FACTOR_POWER_OF_TWO 0x0001
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#define AW_CLK_FACTOR_ZERO_BASED 0x0002
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#define AW_CLK_FACTOR_HAS_COND 0x0004
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#define AW_CLK_FACTOR_FIXED 0x0008
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#define AW_CLK_FACTOR_ZERO_IS_ONE 0x0010
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#define AW_CLK_FACTOR_MIN_VALUE 0x0020
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#define AW_CLK_FACTOR_MAX_VALUE 0x0040
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struct aw_clk_factor {
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uint32_t shift; /* Shift bits for the factor */
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uint32_t mask; /* Mask to get the factor, will be override by the clk methods */
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uint32_t width; /* Number of bits for the factor */
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uint32_t value; /* Fixed value, depends on AW_CLK_FACTOR_FIXED */
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uint32_t cond_shift;
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uint32_t cond_mask;
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uint32_t cond_width;
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uint32_t cond_value;
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uint32_t min_value;
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uint32_t max_value;
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uint32_t flags; /* Flags */
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};
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struct aw_clk_frac {
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uint64_t freq0;
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uint64_t freq1;
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uint32_t mode_sel;
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uint32_t freq_sel;
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};
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static inline uint32_t
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aw_clk_get_factor(uint32_t val, struct aw_clk_factor *factor)
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{
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uint32_t factor_val;
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uint32_t cond;
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if (factor->flags & AW_CLK_FACTOR_HAS_COND) {
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cond = (val & factor->cond_mask) >> factor->cond_shift;
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if (cond != factor->cond_value)
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return (1);
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}
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if (factor->flags & AW_CLK_FACTOR_FIXED)
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return (factor->value);
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factor_val = (val & factor->mask) >> factor->shift;
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if (factor_val == 0 && (factor->flags & AW_CLK_FACTOR_ZERO_IS_ONE))
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factor_val = 1;
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if (factor->flags & AW_CLK_FACTOR_POWER_OF_TWO)
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factor_val = 1 << factor_val;
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else if (!(factor->flags & AW_CLK_FACTOR_ZERO_BASED))
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factor_val += 1;
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return (factor_val);
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}
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static inline uint32_t
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aw_clk_factor_get_max(struct aw_clk_factor *factor)
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{
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uint32_t max;
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if (factor->flags & AW_CLK_FACTOR_FIXED)
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max = factor->value;
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else if (factor->flags & AW_CLK_FACTOR_POWER_OF_TWO)
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max = 1 << ((1 << factor->width) - 1);
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else {
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max = (1 << factor->width);
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}
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return (max);
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}
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static inline uint32_t
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aw_clk_factor_get_min(struct aw_clk_factor *factor)
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{
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uint32_t min;
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if (factor->flags & AW_CLK_FACTOR_FIXED)
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min = factor->value;
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else if (factor->flags & AW_CLK_FACTOR_ZERO_BASED)
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min = 0;
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else if (factor->flags & AW_CLK_FACTOR_MIN_VALUE)
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min = factor->min_value;
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else
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min = 1;
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return (min);
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}
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static inline uint32_t
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aw_clk_factor_get_value(struct aw_clk_factor *factor, uint32_t raw)
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{
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uint32_t val;
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if (factor->flags & AW_CLK_FACTOR_FIXED)
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return (factor->value);
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if (factor->flags & AW_CLK_FACTOR_ZERO_BASED)
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val = raw;
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else if (factor->flags & AW_CLK_FACTOR_POWER_OF_TWO) {
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for (val = 0; raw != 1; val++)
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raw >>= 1;
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} else if (factor->flags & AW_CLK_FACTOR_MAX_VALUE)
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val = factor->max_value;
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else
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val = raw - 1;
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return (val);
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}
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#define CCU_RESET(idx, o, s) \
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[idx] = { \
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.offset = o, \
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.shift = s, \
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},
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#define CCU_GATE(idx, clkname, pname, o, s) \
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[idx] = { \
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.name = clkname, \
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.parent_name = pname, \
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.offset = o, \
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.shift = s, \
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},
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#define NKMP_CLK(_clkname, _id, _name, _pnames, \
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_offset, \
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_n_shift, _n_width, _n_value, _n_flags, \
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_k_shift, _k_width, _k_value, _k_flags, \
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_m_shift, _m_width, _m_value, _m_flags, \
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_p_shift, _p_width, _p_value, _p_flags, \
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_gate, \
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_lock, _lock_retries, \
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_flags) \
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static struct aw_clk_nkmp_def _clkname = { \
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.clkdef = { \
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.id = _id, \
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.name = _name, \
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.parent_names = _pnames, \
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.parent_cnt = nitems(_pnames), \
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}, \
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.offset = _offset, \
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.n.shift = _n_shift, \
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.n.width = _n_width, \
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.n.value = _n_value, \
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.n.flags = _n_flags, \
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.k.shift = _k_shift, \
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.k.width = _k_width, \
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.k.value = _k_value, \
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.k.flags = _k_flags, \
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.m.shift = _m_shift, \
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.m.width = _m_width, \
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.m.value = _m_value, \
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.m.flags = _m_flags, \
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.p.shift = _p_shift, \
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.p.width = _p_width, \
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.p.value = _p_value, \
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.p.flags = _p_flags, \
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.gate_shift = _gate, \
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.lock_shift = _lock, \
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.lock_retries = _lock_retries, \
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.flags = _flags, \
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}
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#define NKMP_CLK_WITH_MUX(_clkname, \
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_id, _name, _pnames, \
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_offset, \
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_n_shift, _n_width, _n_value, _n_flags, \
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_k_shift, _k_width, _k_value, _k_flags, \
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_m_shift, _m_width, _m_value, _m_flags, \
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_p_shift, _p_width, _p_value, _p_flags, \
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_mux_shift, _mux_width, _gate, \
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_lock, _lock_retries, \
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_flags) \
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static struct aw_clk_nkmp_def _clkname = { \
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.clkdef = { \
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.id = _id, \
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.name = _name, \
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.parent_names = _pnames, \
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.parent_cnt = nitems(_pnames), \
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}, \
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.offset = _offset, \
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.n.shift = _n_shift, \
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.n.width = _n_width, \
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.n.value = _n_value, \
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.n.flags = _n_flags, \
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.k.shift = _k_shift, \
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.k.width = _k_width, \
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.k.value = _k_value, \
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.k.flags = _k_flags, \
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.m.shift = _m_shift, \
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.m.width = _m_width, \
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.m.value = _m_value, \
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.m.flags = _m_flags, \
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.p.shift = _p_shift, \
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.p.width = _p_width, \
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.p.value = _p_value, \
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.p.flags = _p_flags, \
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.mux_shift = _mux_shift, \
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.mux_width = _mux_width, \
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.gate_shift = _gate, \
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.lock_shift = _lock, \
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.lock_retries = _lock_retries, \
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.flags = _flags, \
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}
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#define NKMP_CLK_WITH_UPDATE(_clkname, \
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_id, _name, _pnames, \
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_offset, \
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_n_shift, _n_width, _n_value, _n_flags, \
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_k_shift, _k_width, _k_value, _k_flags, \
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_m_shift, _m_width, _m_value, _m_flags, \
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_p_shift, _p_width, _p_value, _p_flags, \
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_gate, \
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_lock, _lock_retries, \
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_update, \
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_flags) \
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static struct aw_clk_nkmp_def _clkname = { \
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.clkdef = { \
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.id = _id, \
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.name = _name, \
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.parent_names = _pnames, \
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.parent_cnt = nitems(_pnames), \
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}, \
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.offset = _offset, \
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.n.shift = _n_shift, \
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.n.width = _n_width, \
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.n.value = _n_value, \
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.n.flags = _n_flags, \
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.k.shift = _k_shift, \
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.k.width = _k_width, \
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.k.value = _k_value, \
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.k.flags = _k_flags, \
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.m.shift = _m_shift, \
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.m.width = _m_width, \
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.m.value = _m_value, \
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.m.flags = _m_flags, \
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.p.shift = _p_shift, \
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.p.width = _p_width, \
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.p.value = _p_value, \
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.p.flags = _p_flags, \
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.gate_shift = _gate, \
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.lock_shift = _lock, \
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.lock_retries = _lock_retries, \
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.update_shift = _update, \
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.flags = _flags | AW_CLK_HAS_UPDATE, \
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}
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#define FRAC_CLK(_clkname, _id, _name, _pnames, \
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_offset, \
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_nshift, _nwidth, _nvalue, _nflags, \
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_mshift, _mwidth, _mvalue, _mflags, \
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_gate_shift, _lock_shift,_lock_retries, \
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_flags, _freq0, _freq1, _mode_sel, _freq_sel, \
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_min_freq, _max_freq) \
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static struct aw_clk_frac_def _clkname = { \
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.clkdef = { \
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.id = _id, \
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.name = _name, \
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.parent_names = _pnames, \
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.parent_cnt = nitems(_pnames), \
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.flags = CLK_NODE_GLITCH_FREE, \
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}, \
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.offset = _offset, \
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.n.shift = _nshift, \
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.n.width = _nwidth, \
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.n.value = _nvalue, \
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.n.flags = _nflags, \
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.m.shift = _mshift, \
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.m.width = _mwidth, \
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.m.value = _mvalue, \
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.m.flags = _mflags, \
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.gate_shift = _gate_shift, \
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.lock_shift = _lock_shift, \
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.lock_retries = _lock_retries, \
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.flags = _flags, \
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.frac.freq0 = _freq0, \
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.frac.freq1 = _freq1, \
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.frac.mode_sel = _mode_sel, \
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.frac.freq_sel = _freq_sel, \
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.min_freq = _min_freq, \
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.max_freq = _max_freq, \
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}
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#define M_CLK(_clkname, _id, _name, _pnames, \
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_offset, \
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_mshift, _mwidth, _mvalue, _mflags, \
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_mux_shift, _mux_width, \
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_gate_shift, \
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_flags) \
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static struct aw_clk_m_def _clkname = { \
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.clkdef = { \
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.id = _id, \
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.name = _name, \
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.parent_names = _pnames, \
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.parent_cnt = nitems(_pnames), \
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}, \
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.offset = _offset, \
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.mux_shift = _mux_shift, \
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.m.shift = _mshift, \
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.m.width = _mwidth, \
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.m.value = _mvalue, \
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.m.flags = _mflags, \
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.mux_width = _mux_width, \
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.gate_shift = _gate_shift, \
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.flags = _flags, \
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}
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#define NM_CLK(_clkname, _id, _name, _pnames, \
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_offset, \
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_nshift, _nwidth, _nvalue, _nflags, \
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_mshift, _mwidth, _mvalue, _mflags, \
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_mux_shift, _mux_width, \
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_gate_shift, \
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_flags) \
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static struct aw_clk_nm_def _clkname = { \
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.clkdef = { \
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.id = _id, \
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.name = _name, \
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.parent_names = _pnames, \
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.parent_cnt = nitems(_pnames), \
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}, \
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.offset = _offset, \
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.n.shift = _nshift, \
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.n.width = _nwidth, \
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.n.value = _nvalue, \
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.n.flags = _nflags, \
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.mux_shift = _mux_shift, \
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.m.shift = _mshift, \
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.m.width = _mwidth, \
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.m.value = _mvalue, \
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.m.flags = _mflags, \
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.mux_width = _mux_width, \
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.gate_shift = _gate_shift, \
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.flags = _flags, \
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}
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#define NMM_CLK(_clkname, _id, _name, _pnames, \
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_offset, \
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_nshift, _nwidth, _nvalue, _nflags, \
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_m0shift, _m0width, _m0value, _m0flags, \
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_m1shift, _m1width, _m1value, _m1flags, \
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_gate_shift, \
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_lock, _lock_retries, \
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_flags) \
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static struct aw_clk_nmm_def _clkname = { \
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.clkdef = { \
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.id = _id, \
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.name = _name, \
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.parent_names = _pnames, \
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.parent_cnt = nitems(_pnames), \
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}, \
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.offset = _offset, \
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.n.shift = _nshift, \
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.n.width = _nwidth, \
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.n.value = _nvalue, \
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.n.flags = _nflags, \
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.m0.shift = _m0shift, \
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.m0.width = _m0width, \
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.m0.value = _m0value, \
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.m0.flags = _m0flags, \
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.m1.shift = _m1shift, \
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.m1.width = _m1width, \
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.m1.value = _m1value, \
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.m1.flags = _m1flags, \
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.gate_shift = _gate_shift, \
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.lock_shift = _lock, \
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.lock_retries = _lock_retries, \
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.flags = _flags, \
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}
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#define NP_CLK(_clkname, _id, _name, _pnames, \
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_offset, \
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_nshift, _nwidth, _nvalue, _nflags, \
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_pshift, _pwidth, _pvalue, _pflags, \
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_gate_shift, \
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_lock, _lock_retries, \
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_flags) \
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static struct aw_clk_np_def _clkname = { \
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.clkdef = { \
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.id = _id, \
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.name = _name, \
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.parent_names = _pnames, \
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.parent_cnt = nitems(_pnames), \
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}, \
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.offset = _offset, \
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.n.shift = _nshift, \
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.n.width = _nwidth, \
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.n.value = _nvalue, \
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.n.flags = _nflags, \
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.p.shift = _pshift, \
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.p.width = _pwidth, \
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.p.value = _pvalue, \
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.p.flags = _pflags, \
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.gate_shift = _gate_shift, \
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.lock_shift = _lock, \
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.lock_retries = _lock_retries, \
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.flags = _flags, \
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}
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#define PREDIV_CLK(_clkname, _id, _name, _pnames, \
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_offset, \
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_mux_shift, _mux_width, \
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_div_shift, _div_width, _div_value, _div_flags, \
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_prediv_shift, _prediv_width, _prediv_value, _prediv_flags, \
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_prediv_cond_shift, _prediv_cond_width, _prediv_cond_value) \
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static struct aw_clk_prediv_mux_def _clkname = { \
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|
.clkdef = { \
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|
.id = _id, \
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.name = _name, \
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|
.parent_names = _pnames, \
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|
.parent_cnt = nitems(_pnames), \
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|
}, \
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.offset = _offset, \
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.mux_shift = _mux_shift, \
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.mux_width = _mux_width, \
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.div.shift = _div_shift, \
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|
.div.width = _div_width, \
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|
.div.value = _div_value, \
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.div.flags = _div_flags, \
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|
.prediv.shift = _prediv_shift, \
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|
.prediv.width = _prediv_width, \
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|
.prediv.value = _prediv_value, \
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|
.prediv.flags = _prediv_flags, \
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|
.prediv.cond_shift = _prediv_cond_shift, \
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|
.prediv.cond_width = _prediv_cond_width, \
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|
.prediv.cond_value = _prediv_cond_value, \
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|
}
|
|
|
|
#define PREDIV_CLK_WITH_MASK(_clkname, _id, _name, _pnames, \
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|
_offset, \
|
|
_mux_shift, _mux_width, \
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|
_div_shift, _div_width, _div_value, _div_flags, \
|
|
_prediv_shift, _prediv_width, _prediv_value, _prediv_flags, \
|
|
_prediv_cond_mask, _prediv_cond_value) \
|
|
static struct aw_clk_prediv_mux_def _clkname = { \
|
|
.clkdef = { \
|
|
.id = _id, \
|
|
.name = _name, \
|
|
.parent_names = _pnames, \
|
|
.parent_cnt = nitems(_pnames), \
|
|
}, \
|
|
.offset = _offset, \
|
|
.mux_shift = _mux_shift, \
|
|
.mux_width = _mux_width, \
|
|
.div.shift = _div_shift, \
|
|
.div.width = _div_width, \
|
|
.div.value = _div_value, \
|
|
.div.flags = _div_flags, \
|
|
.prediv.shift = _prediv_shift, \
|
|
.prediv.width = _prediv_width, \
|
|
.prediv.value = _prediv_value, \
|
|
.prediv.flags = _prediv_flags, \
|
|
.prediv.cond_shift = 0, \
|
|
.prediv.cond_width = 0, \
|
|
.prediv.cond_mask = _prediv_cond_mask, \
|
|
.prediv.cond_value = _prediv_cond_value, \
|
|
}
|
|
|
|
#define MIPI_CLK(_clkname, _id, _name, _pnames, \
|
|
_offset, \
|
|
_kshift, _kwidth, _kflags, _kmin, \
|
|
_mshift, _mwidth, \
|
|
_nshift, _nwidth, \
|
|
_gate_shift, _lock_shift) \
|
|
static struct aw_clk_mipi_def _clkname = { \
|
|
.clkdef = { \
|
|
.id = _id, \
|
|
.name = _name, \
|
|
.parent_names = _pnames, \
|
|
.parent_cnt = nitems(_pnames) \
|
|
}, \
|
|
.offset = _offset, \
|
|
.k.shift = _kshift, \
|
|
.k.width = _kwidth, \
|
|
.k.flags = _kflags, \
|
|
.k.min_value = _kmin, \
|
|
.m.shift = _mshift, \
|
|
.m.width = _mwidth, \
|
|
.n.shift = _nshift, \
|
|
.n.width = _nwidth, \
|
|
.gate_shift = _gate_shift, \
|
|
.lock_shift = _lock_shift, \
|
|
}
|
|
|
|
#define MUX_CLK(_clkname, _id, _name, _pnames, \
|
|
_offset, _shift, _width) \
|
|
static struct clk_mux_def _clkname = { \
|
|
.clkdef = { \
|
|
.id = _id, \
|
|
.name = _name, \
|
|
.parent_names = _pnames, \
|
|
.parent_cnt = nitems(_pnames) \
|
|
}, \
|
|
.offset = _offset, \
|
|
.shift = _shift, \
|
|
.width = _width, \
|
|
}
|
|
|
|
#define DIV_CLK(_clkname, _id, _name, _pnames, \
|
|
_offset, \
|
|
_i_shift, _i_width, \
|
|
_div_flags, _div_table) \
|
|
static struct clk_div_def _clkname = { \
|
|
.clkdef = { \
|
|
.id = _id, \
|
|
.name = _name, \
|
|
.parent_names = _pnames, \
|
|
.parent_cnt = nitems(_pnames) \
|
|
}, \
|
|
.offset = _offset, \
|
|
.i_shift = _i_shift, \
|
|
.i_width = _i_width, \
|
|
.div_flags = _div_flags, \
|
|
.div_table = _div_table, \
|
|
}
|
|
|
|
#define FIXED_CLK(_clkname, _id, _name, _pnames, \
|
|
_freq, _mult, _div, _flags) \
|
|
static struct clk_fixed_def _clkname = { \
|
|
.clkdef = { \
|
|
.id = _id, \
|
|
.name = _name, \
|
|
.parent_names = _pnames, \
|
|
.parent_cnt = 1, \
|
|
}, \
|
|
.freq = _freq, \
|
|
.mult = _mult, \
|
|
.div = _div, \
|
|
.fixed_flags = _flags, \
|
|
}
|
|
|
|
#endif /* __AW_CLK_H__ */
|