c76b8bda0b
In the recent dts sync the name of the aips-bus@ changed to bus@. Reflect this change and add an additional OF_finddevice in fix_fdt_interrupt_data() and in fix_fdt_iomuxc_data() with bus@ only. Iow, keep the old naming for compatibility. Discussed with: ian@
383 lines
13 KiB
C
383 lines
13 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/reboot.h>
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#include <sys/devmap.h>
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#include <vm/vm.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <machine/machdep.h>
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#include <machine/platformvar.h>
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#include <arm/arm/mpcore_timervar.h>
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#include <arm/freescale/imx/imx6_anatopreg.h>
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#include <arm/freescale/imx/imx6_anatopvar.h>
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#include <arm/freescale/imx/imx_machdep.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <arm/freescale/imx/imx6_machdep.h>
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#include "platform_if.h"
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#include "platform_pl310_if.h"
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static platform_attach_t imx6_attach;
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static platform_devmap_init_t imx6_devmap_init;
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static platform_late_init_t imx6_late_init;
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static platform_cpu_reset_t imx6_cpu_reset;
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/*
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* Fix FDT data related to interrupts.
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*
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* Driven by the needs of linux and its drivers (as always), the published FDT
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* data for imx6 now sets the interrupt parent for most devices to the GPC
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* interrupt controller, which is for use when the chip is in deep-sleep mode.
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* We don't support deep sleep or have a GPC-PIC driver; we need all interrupts
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* to be handled by the GIC.
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*
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* Luckily, the change to the FDT data was to assign the GPC as the interrupt
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* parent for the soc node and letting that get inherited by all other devices
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* (except a few that directly name GIC as their interrupt parent). So we can
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* set the world right by just changing the interrupt-parent property of the soc
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* node to refer to GIC instead of GPC. This will get us by until we write our
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* own GPC driver (or until linux changes its mind and the FDT data again).
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*
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* We validate that we have data that looks like we expect before changing it:
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* - SOC node exists and has GPC as its interrupt parent.
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* - GPC node exists and has GIC as its interrupt parent.
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* - GIC node exists and is its own interrupt parent or has no parent.
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*
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* This applies to all models of imx6. Luckily all of them have the devices
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* involved at the same addresses on the same buses, so we don't need any
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* per-soc logic. We handle this at platform attach time rather than via the
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* fdt_fixup_table, because the latter requires matching on the FDT "model"
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* property, and this applies to all boards including those not yet invented.
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*
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* This just in: as of the import of dts files from linux 4.15 on 2018-02-10,
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* they appear to have applied a new style rule to the dts which forbids leading
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* zeroes in the @address qualifiers on node names. Since we have to find those
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* nodes by string matching we now have to search for both flavors of each node
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* name involved.
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*/
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static void
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fix_fdt_interrupt_data(void)
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{
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phandle_t gicipar, gicnode, gicxref;
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phandle_t gpcipar, gpcnode, gpcxref;
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phandle_t socipar, socnode;
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int result;
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socnode = OF_finddevice("/soc");
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if (socnode == -1)
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return;
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result = OF_getencprop(socnode, "interrupt-parent", &socipar,
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sizeof(socipar));
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if (result <= 0)
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return;
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/* GIC node may be child of soc node, or appear directly at root. */
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gicnode = OF_finddevice("/soc/interrupt-controller@00a01000");
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if (gicnode == -1)
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gicnode = OF_finddevice("/soc/interrupt-controller@a01000");
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if (gicnode == -1) {
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gicnode = OF_finddevice("/interrupt-controller@00a01000");
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if (gicnode == -1)
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gicnode = OF_finddevice("/interrupt-controller@a01000");
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if (gicnode == -1)
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return;
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}
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gicxref = OF_xref_from_node(gicnode);
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/* If gic node has no parent, pretend it is its own parent. */
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result = OF_getencprop(gicnode, "interrupt-parent", &gicipar,
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sizeof(gicipar));
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if (result <= 0)
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gicipar = gicxref;
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gpcnode = OF_finddevice("/soc/aips-bus@02000000/gpc@020dc000");
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if (gpcnode == -1)
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gpcnode = OF_finddevice("/soc/aips-bus@2000000/gpc@20dc000");
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if (gpcnode == -1)
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gpcnode = OF_finddevice("/soc/bus@2000000/gpc@20dc000");
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if (gpcnode == -1)
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return;
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result = OF_getencprop(gpcnode, "interrupt-parent", &gpcipar,
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sizeof(gpcipar));
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if (result <= 0)
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return;
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gpcxref = OF_xref_from_node(gpcnode);
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if (socipar != gpcxref || gpcipar != gicxref || gicipar != gicxref)
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return;
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gicxref = cpu_to_fdt32(gicxref);
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OF_setprop(socnode, "interrupt-parent", &gicxref, sizeof(gicxref));
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}
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static void
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fix_fdt_iomuxc_data(void)
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{
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phandle_t node;
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/*
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* The linux dts defines two nodes with the same mmio address range,
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* iomuxc-gpr and the regular iomuxc. The -grp node is a simple_mfd and
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* a syscon, but it only has access to a small subset of the iomuxc
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* registers, so it can't serve as the accessor for the iomuxc driver's
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* register IO. But right now, the simple_mfd driver attaches first,
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* preventing the real iomuxc driver from allocating its mmio register
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* range because it partially overlaps with the -gpr range.
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*
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* For now, by far the easiest thing to do to keep imx6 working is to
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* just disable the iomuxc-gpr node because we don't have a driver for
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* it anyway, we just need to prevent attachment of simple_mfd.
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*
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* If we ever write a -gpr driver, this code should probably switch to
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* modifying the reg property so that the range covers all the iomuxc
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* regs, then the -gpr driver can be a regular syscon driver that iomuxc
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* uses for register access.
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*/
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node = OF_finddevice("/soc/aips-bus@2000000/iomuxc-gpr@20e0000");
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if (node == -1)
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node = OF_finddevice("/soc/bus@2000000/iomuxc-gpr@20e0000");
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if (node != -1)
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OF_setprop(node, "status", "disabled", sizeof("disabled"));
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}
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static int
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imx6_attach(platform_t plat)
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{
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/* Fix soc interrupt-parent property. */
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fix_fdt_interrupt_data();
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/* Fix iomuxc-gpr and iomuxc nodes both using the same mmio range. */
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fix_fdt_iomuxc_data();
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/* Inform the MPCore timer driver that its clock is variable. */
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arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES);
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return (0);
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}
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static void
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imx6_late_init(platform_t plat)
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{
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const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004;
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imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS);
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}
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/*
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* Set up static device mappings.
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*
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* This attempts to cover the most-used devices with 1MB section mappings, which
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* is good for performance (uses fewer TLB entries for device access).
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*
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* ARMMP covers the interrupt controller, MPCore timers, global timer, and the
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* L2 cache controller. Most of the 1MB range is unused reserved space.
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*
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* AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc.
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*
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* Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in
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* the memory map. When we get support for graphics it might make sense to
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* static map some of that area. Be careful with other things in that area such
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* as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory.
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*/
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static int
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imx6_devmap_init(platform_t plat)
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{
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const uint32_t IMX6_ARMMP_PHYS = 0x00a00000;
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const uint32_t IMX6_ARMMP_SIZE = 0x00100000;
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const uint32_t IMX6_AIPS1_PHYS = 0x02000000;
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const uint32_t IMX6_AIPS1_SIZE = 0x00100000;
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const uint32_t IMX6_AIPS2_PHYS = 0x02100000;
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const uint32_t IMX6_AIPS2_SIZE = 0x00100000;
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devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE);
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devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE);
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devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE);
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return (0);
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}
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static void
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imx6_cpu_reset(platform_t plat)
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{
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const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000;
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imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS);
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}
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/*
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* Determine what flavor of imx6 we're running on.
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*
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* This code is based on the way u-boot does it. Information found on the web
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* indicates that Freescale themselves were the original source of this logic,
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* including the strange check for number of CPUs in the SCU configuration
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* register, which is apparently needed on some revisions of the SOLO.
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*
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* According to the documentation, there is such a thing as an i.MX6 Dual
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* (non-lite flavor). However, Freescale doesn't seem to have assigned it a
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* number or provided any logic to handle it in their detection code.
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*
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* Note that the ANALOG_DIGPROG and SCU configuration registers are not
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* documented in the chip reference manual. (SCU configuration is mentioned,
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* but not mapped out in detail.) I think the bottom two bits of the scu config
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* register may be ncpu-1.
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*
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* This hasn't been tested yet on a dual[-lite].
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*
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* On a solo:
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* digprog = 0x00610001
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* hwsoc = 0x00000062
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* scu config = 0x00000500
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* On a quad:
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* digprog = 0x00630002
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* hwsoc = 0x00000063
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* scu config = 0x00005503
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*/
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u_int
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imx_soc_type(void)
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{
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uint32_t digprog, hwsoc;
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uint32_t *pcr;
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static u_int soctype;
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const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004;
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#define HWSOC_MX6SL 0x60
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#define HWSOC_MX6DL 0x61
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#define HWSOC_MX6SOLO 0x62
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#define HWSOC_MX6Q 0x63
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#define HWSOC_MX6UL 0x64
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if (soctype != 0)
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return (soctype);
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digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL);
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hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) &
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IMX6_ANALOG_DIGPROG_SOCTYPE_MASK;
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if (hwsoc != HWSOC_MX6SL) {
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digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG);
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hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >>
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IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT;
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/*printf("digprog = 0x%08x\n", digprog);*/
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if (hwsoc == HWSOC_MX6DL) {
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pcr = devmap_ptov(SCU_CONFIG_PHYSADDR, 4);
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if (pcr != NULL) {
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/*printf("scu config = 0x%08x\n", *pcr);*/
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if ((*pcr & 0x03) == 0) {
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hwsoc = HWSOC_MX6SOLO;
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}
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}
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}
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}
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/* printf("hwsoc 0x%08x\n", hwsoc); */
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switch (hwsoc) {
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case HWSOC_MX6SL:
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soctype = IMXSOC_6SL;
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break;
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case HWSOC_MX6SOLO:
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soctype = IMXSOC_6S;
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break;
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case HWSOC_MX6DL:
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soctype = IMXSOC_6DL;
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break;
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case HWSOC_MX6Q :
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soctype = IMXSOC_6Q;
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break;
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case HWSOC_MX6UL:
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soctype = IMXSOC_6UL;
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break;
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default:
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printf("imx_soc_type: Don't understand hwsoc 0x%02x, "
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"digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog);
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soctype = IMXSOC_6Q;
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break;
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}
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return (soctype);
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}
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/*
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* Early putc routine for EARLY_PRINTF support. To use, add to kernel config:
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* option SOCDEV_PA=0x02000000
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* option SOCDEV_VA=0x02000000
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* option EARLY_PRINTF
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* Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It
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* makes sense now, but if multiple SOCs do that it will make early_putc another
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* duplicate symbol to be eliminated on the path to a generic kernel.
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*/
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#if 0
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static void
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imx6_early_putc(int c)
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{
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volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098;
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volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040;
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const uint32_t UART_TXRDY = (1 << 3);
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while ((*UART_STAT_REG & UART_TXRDY) == 0)
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continue;
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*UART_TX_REG = c;
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}
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early_putc_t *early_putc = imx6_early_putc;
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#endif
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static platform_method_t imx6_methods[] = {
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PLATFORMMETHOD(platform_attach, imx6_attach),
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PLATFORMMETHOD(platform_devmap_init, imx6_devmap_init),
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PLATFORMMETHOD(platform_late_init, imx6_late_init),
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PLATFORMMETHOD(platform_cpu_reset, imx6_cpu_reset),
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#ifdef SMP
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PLATFORMMETHOD(platform_mp_start_ap, imx6_mp_start_ap),
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PLATFORMMETHOD(platform_mp_setmaxid, imx6_mp_setmaxid),
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#endif
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PLATFORMMETHOD(platform_pl310_init, imx6_pl310_init),
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PLATFORMMETHOD_END,
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};
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FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 80);
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FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 80);
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FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 80);
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FDT_PLATFORM_DEF2(imx6, imx6ul, "i.MX6 UltraLite", 0, "fsl,imx6ul", 67);
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