03479763b2
available on firmwares 3.15 and earlier. Caveats: Support for the internal SATA controller is currently missing, as is support for framebuffer resolutions other than 720x480. These deficiencies will be remedied soon. Special thanks to Peter Grehan for providing the hardware that made this port possible, and thanks to Geoff Levand of Sony Computer Entertainment for advice on the LV1 hypervisor.
111 lines
7.8 KiB
C
111 lines
7.8 KiB
C
/*
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* Playstation 3 LV1 hypercall interface
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*
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* $FreeBSD$
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*/
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#include <sys/types.h>
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enum lpar_id {
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PS3_LPAR_ID_CURRENT = 0x00,
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PS3_LPAR_ID_PME = 0x01,
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};
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static inline uint64_t
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lv1_repository_string(const char *str)
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{
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uint64_t ret = 0;
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strncpy((char *)&ret, str, sizeof(ret));
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return (ret);
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}
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int lv1_allocate_memory(uint64_t size, uint64_t log_page_size, uint64_t zero, uint64_t flags, uint64_t *base_addr, uint64_t *muid);
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int lv1_write_htab_entry(uint64_t vas_id, uint64_t slot, uint64_t pte_hi, uint64_t pte_lo);
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int lv1_construct_virtual_address_space(uint64_t log_pteg_count, uint64_t n_sizes, uint64_t page_sizes, uint64_t *vas_id, uint64_t *hv_pteg_count);
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int lv1_get_virtual_address_space_id_of_ppe(uint64_t ppe_id, uint64_t *vas_id);
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int lv1_query_logical_partition_address_region_info(uint64_t lpar_id, uint64_t *base_addr, uint64_t *size, uint64_t *access_right, uint64_t *max_page_size, uint64_t *flags);
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int lv1_select_virtual_address_space(uint64_t vas_id);
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int lv1_pause(uint64_t mode);
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int lv1_destruct_virtual_address_space(uint64_t vas_id);
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int lv1_configure_irq_state_bitmap(uint64_t ppe_id, uint64_t cpu_id, uint64_t bitmap_addr);
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int lv1_connect_irq_plug_ext(uint64_t ppe_id, uint64_t cpu_id, uint64_t virq, uint64_t outlet, uint64_t zero);
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int lv1_release_memory(uint64_t base_addr);
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int lv1_put_iopte(uint64_t ioas_id, uint64_t ioif_addr, uint64_t lpar_addr, uint64_t io_id, uint64_t flags);
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int lv1_disconnect_irq_plug_ext(uint64_t ppe_id, uint64_t cpu_id, uint64_t virq);
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int lv1_construct_event_receive_port(uint64_t *outlet);
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int lv1_destruct_event_receive_port(uint64_t outlet);
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int lv1_send_event_locally(uint64_t outlet);
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int lv1_end_of_interrupt(uint64_t irq);
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int lv1_connect_irq_plug(uint64_t virq, uint64_t irq);
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int lv1_disconnect_irq_plus(uint64_t virq);
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int lv1_end_of_interrupt_ext(uint64_t ppe_id, uint64_t cpu_id, uint64_t virq);
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int lv1_did_update_interrupt_mask(uint64_t ppe_id, uint64_t cpu_id);
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int lv1_shutdown_logical_partition(uint64_t cmd);
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int lv1_destruct_logical_spe(uint64_t spe_id);
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int lv1_construct_logical_spe(uint64_t pshift1, uint64_t pshift2, uint64_t pshift3, uint64_t pshift4, uint64_t pshift5, uint64_t vas_id, uint64_t spe_type, uint64_t *priv2_addr, uint64_t *problem_phys, uint64_t *local_store_phys, uint64_t *unused, uint64_t *shadow_addr, uint64_t *spe_id);
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int lv1_set_spe_interrupt_mask(uint64_t spe_id, uint64_t class, uint64_t mask);
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int lv1_disable_logical_spe(uint64_t spe_id, uint64_t zero);
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int lv1_clear_spe_interrupt_status(uint64_t spe_id, uint64_t class, uint64_t stat, uint64_t zero);
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int lv1_get_spe_interrupt_status(uint64_t spe_id, uint64_t class, uint64_t *stat);
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int lv1_get_logical_ppe_id(uint64_t *ppe_id);
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int lv1_get_logical_partition_id(uint64_t *lpar_id);
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int lv1_get_spe_irq_outlet(uint64_t spe_id, uint64_t class, uint64_t *outlet);
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int lv1_set_spe_privilege_state_area_1_register(uint64_t spe_id, uint64_t offset, uint64_t value);
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int lv1_get_repository_node_value(uint64_t lpar_id, uint64_t n1, uint64_t n2, uint64_t n3, uint64_t n4, uint64_t *v1, uint64_t *v2);
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int lv1_read_htab_entries(uint64_t vas_id, uint64_t slot, uint64_t *hi1, uint64_t *hi2, uint64_t *hi3, uint64_t *hi4, uint64_t *rcbits);
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int lv1_set_dabr(uint64_t dabr, uint64_t flags);
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int lv1_allocate_io_segment(uint64_t ioas_id, uint64_t seg_size, uint64_t io_pagesize, uint64_t *ioif_addr);
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int lv1_release_io_segment(uint64_t ioas_id, uint64_t ioif_addr);
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int lv1_construct_io_irq_outlet(uint64_t interrupt_id, uint64_t *outlet);
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int lv1_destruct_io_irq_outlet(uint64_t outlet);
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int lv1_map_htab(uint64_t lpar_id, uint64_t *htab_addr);
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int lv1_unmap_htab(uint64_t htab_addr);
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int lv1_get_version_info(uint64_t *firm_vers);
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int lv1_insert_htab_entry(uint64_t vas_id, uint64_t pteg, uint64_t pte_hi, uint64_t pte_lo, uint64_t lockflags, uint64_t flags, uint64_t *index, uint64_t *evicted_hi, uint64_t *evicted_lo);
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int lv1_read_virtual_uart(uint64_t port, uint64_t buffer, uint64_t bytes, uint64_t *bytes_read);
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int lv1_write_virtual_uart(uint64_t port, uint64_t buffer, uint64_t bytes, uint64_t *bytes_written);
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int lv1_set_virtual_uart_param(uint64_t port, uint64_t param, uint64_t value);
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int lv1_get_virtual_uart_param(uint64_t port, uint64_t param, uint64_t *value);
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int lv1_configure_virtual_uart(uint64_t lpar_addr, uint64_t *outlet);
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int lv1_open_device(uint64_t bus, uint64_t dev, uint64_t zero);
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int lv1_close_device(uint64_t bus, uint64_t dev);
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int lv1_map_device_mmio_region(uint64_t bus, uint64_t dev, uint64_t bus_addr, uint64_t size, uint64_t page_size, uint64_t *lpar_addr);
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int lv1_unmap_device_mmio_region(uint64_t bus, uint64_t dev, uint64_t lpar_addr);
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int lv1_allocate_device_dma_region(uint64_t bus, uint64_t dev, uint64_t io_size, uint64_t io_pagesize, uint64_t flag, uint64_t *dma_region);
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int lv1_free_device_dma_region(uint64_t bus, uint64_t dev, uint64_t dma_region);
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int lv1_map_device_dma_region(uint64_t bus, uint64_t dev, uint64_t lpar_addr, uint64_t dma_region, uint64_t size, uint64_t flags);
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int lv1_unmap_device_dma_region(uint64_t bus, uint64_t dev, uint64_t dma_region, uint64_t size);
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int lv1_read_pci_config(uint64_t ps3bus, uint64_t bus, uint64_t dev, uint64_t func, uint64_t offset, uint64_t size, uint64_t *result);
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int lv1_write_pci_config(uint64_t ps3bus, uint64_t bus, uint64_t dev, uint64_t func, uint64_t offset, uint64_t size, uint64_t data);
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int lv1_net_add_multicast_address(uint64_t bus, uint64_t dev, uint64_t addr, uint64_t flags);
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int lv1_net_remove_multicast_address(uint64_t bus, uint64_t dev, uint64_t zero, uint64_t one);
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int lv1_net_start_tx_dma(uint64_t bus, uint64_t dev, uint64_t bus_addr, uint64_t zero);
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int lv1_net_stop_tx_dma(uint64_t bus, uint64_t dev, uint64_t zero);
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int lv1_net_start_rx_dma(uint64_t bus, uint64_t dev, uint64_t bus_addr, uint64_t zero);
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int lv1_net_stop_rx_dma(uint64_t bus, uint64_t dev, uint64_t zero);
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int lv1_net_set_interrupt_status_indicator(uint64_t bus, uint64_t dev, uint64_t irq_status_addr, uint64_t zero);
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int lv1_net_set_interrupt_mask(uint64_t bus, uint64_t dev, uint64_t mask, uint64_t zero);
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int lv1_net_control(uint64_t bus, uint64_t dev, uint64_t p1, uint64_t p2, uint64_t p3, uint64_t p4, uint64_t *v1, uint64_t *v2);
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int lv1_connect_interrupt_event_receive_port(uint64_t bus, uint64_t dev, uint64_t outlet, uint64_t irq);
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int lv1_disconnect_interrupt_event_receive_port(uint64_t bus, uint64_t dev, uint64_t outlet, uint64_t irq);
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int lv1_deconfigure_virtual_uart_irq(void);
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int lv1_enable_logical_spe(uint64_t spe_id, uint64_t resource_id);
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int lv1_gpu_open(uint64_t zero);
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int lv1_gpu_close(void);
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int lv1_gpu_device_map(uint64_t dev, uint64_t *lpar_addr, uint64_t *lpar_size);
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int lv1_gpu_device_unmap(uint64_t dev);
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int lv1_gpu_memory_allocate(uint64_t ddr_size, uint64_t zero1, uint64_t zero2, uint64_t zero3, uint64_t zero4, uint64_t *handle, uint64_t *ddr_lpar);
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int lv1_gpu_memory_free(uint64_t handle);
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int lv1_gpu_context_allocate(uint64_t handle, uint64_t , uint64_t *zero);
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int lv1_gpu_context_free(uint64_t chandle);
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int lv1_gpu_context_iomap(uint64_t changle, uint64_t gpu_ioif, uint64_t xdr_lpar, uint64_t fbsize, uint64_t ioflags);
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int lv1_gpu_context_attribute(uint64_t chandle, uint64_t op, uint64_t p1, uint64_t p2, uint64_t p3, uint64_t p4);
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int lv1_gpu_context_intr(uint64_t chandle, uint64_t *v1);
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int lv1_get_rtc(uint64_t *rtc_val, uint64_t *timebase);
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int lv1_storage_read(uint64_t dev, uint64_t region, uint64_t sector, uint64_t nsectors, uint64_t flags, uint64_t buf, uint64_t *dma_tag);
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int lv1_storage_write(uint64_t dev, uint64_t region, uint64_t sector, uint64_t nsectors, uint64_t flags, uint64_t buf, uint64_t *dma_tag);
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int lv1_storage_send_device_command(uint64_t dev, uint64_t cmd_id, uint64_t cmd_block, uint64_t cmd_size, uint64_t data_buf, uint64_t blocks, uint64_t *dma_tag);
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int lv1_storage_get_async_status(uint64_t dev, uint64_t *dma_tag, uint64_t *status);
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int lv1_storage_check_async_status(uint64_t dev, uint64_t dma_tag, uint64_t *status);
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int lv1_panic(uint64_t howto);
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