08e3ff329a
bhyve supports a single timer block with 8 timers. The timers are all 32-bit and capable of being operated in periodic mode. All timers support interrupt delivery using MSI. Timers 0 and 1 also support legacy interrupt routing. At the moment the timers are not connected to any ioapic pins but that will be addressed in a subsequent commit. This change is based on a patch from Tycho Nightingale (tycho.nightingale@pluribusnetworks.com).
64 lines
1.2 KiB
Makefile
64 lines
1.2 KiB
Makefile
# $FreeBSD$
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KMOD= vmm
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SRCS= opt_acpi.h opt_ddb.h device_if.h bus_if.h pci_if.h
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CFLAGS+= -DVMM_KEEP_STATS -DSMP
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CFLAGS+= -I${.CURDIR}/../../amd64/vmm
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CFLAGS+= -I${.CURDIR}/../../amd64/vmm/io
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CFLAGS+= -I${.CURDIR}/../../amd64/vmm/intel
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# generic vmm support
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.PATH: ${.CURDIR}/../../amd64/vmm
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SRCS+= vmm.c \
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vmm_dev.c \
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vmm_host.c \
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vmm_instruction_emul.c \
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vmm_ipi.c \
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vmm_lapic.c \
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vmm_mem.c \
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vmm_msr.c \
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vmm_stat.c \
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vmm_util.c \
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x86.c \
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vmm_support.S
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.PATH: ${.CURDIR}/../../amd64/vmm/io
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SRCS+= iommu.c \
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ppt.c \
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vhpet.c \
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vioapic.c \
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vlapic.c
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# intel-specific files
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.PATH: ${.CURDIR}/../../amd64/vmm/intel
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SRCS+= ept.c \
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vmcs.c \
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vmx_msr.c \
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vmx.c \
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vtd.c
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# amd-specific files
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.PATH: ${.CURDIR}/../../amd64/vmm/amd
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SRCS+= amdv.c
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OBJS= vmx_support.o
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CLEANFILES= vmx_assym.s vmx_genassym.o
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vmx_assym.s: vmx_genassym.o
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.if exists(@)
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vmx_assym.s: @/kern/genassym.sh
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.endif
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sh @/kern/genassym.sh vmx_genassym.o > ${.TARGET}
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vmx_support.o: vmx_support.S vmx_assym.s
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${CC} -c -x assembler-with-cpp -DLOCORE ${CFLAGS} \
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${.IMPSRC} -o ${.TARGET}
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vmx_genassym.o: vmx_genassym.c @ machine x86
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${CC} -c ${CFLAGS:N-fno-common} ${.IMPSRC}
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.include <bsd.kmod.mk>
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