180 lines
10 KiB
C
180 lines
10 KiB
C
/*
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* octeon_pip.h Packet Input Processing Block
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*
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*/
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#ifndef __OCTEON_PIP_H__
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#define __OCTEON_PIP_H__
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/**
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* Enumeration representing the amount of packet processing
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* and validation performed by the input hardware.
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*/
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typedef enum
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{
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OCTEON_PIP_PORT_CFG_MODE_NONE = 0ull, /**< Packet input doesn't perform any
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processing of the input packet. */
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OCTEON_PIP_PORT_CFG_MODE_SKIPL2 = 1ull,/**< Full packet processing is performed
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with pointer starting at the L2
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(ethernet MAC) header. */
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OCTEON_PIP_PORT_CFG_MODE_SKIPIP = 2ull /**< Input packets are assumed to be IP.
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Results from non IP packets is
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undefined. Pointers reference the
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beginning of the IP header. */
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} octeon_pip_port_parse_mode_t;
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#define OCTEON_PIP_PRT_CFGX(offset) (0x80011800A0000200ull+((offset)*8))
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#define OCTEON_PIP_PRT_TAGX(offset) (0x80011800A0000400ull+((offset)*8))
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#define OCTEON_PIP_STAT_INB_PKTS(port) (0x80011800A0001A00ull+((port) * 32))
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#define OCTEON_PIP_STAT_INB_ERRS(port) (0x80011800A0001A10ull+((port) * 32))
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/*
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* PIP Global Config
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*/
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typedef union {
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uint64_t word64;
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struct {
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uint64_t reserved2 : 45; /* Must be zero */
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uint64_t tag_syn : 1; /* Not Include src_crc in TCP..*/
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uint64_t ip6_udp : 1; /* IPv6/UDP checksum is mandatory */
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uint64_t max_l2 : 1; /* Largest L2 frame. 0/1 : 1500/1535 */
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uint64_t reserved1 : 5; /* Must be zero */
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uint64_t raw_shf : 3; /* PCI RAW Packet shift/pad amount */
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uint64_t reserved0 : 5; /* Must be zero */
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uint64_t nip_shf : 3; /* Non-IP shift/pad amount */
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} bits;
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} octeon_pip_gbl_cfg_t;
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typedef union {
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uint64_t word64;
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struct {
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uint64_t reserved4 : 37; /* Must be zero */
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uint64_t qos : 3; /* Default POW QoS queue */
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uint64_t qos_wat : 4; /* Bitfield to enable QoS watcher */
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/* look up tables. 4 per port. */
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uint64_t reserved3 : 1; /* Must be zero */
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uint64_t spare : 1; /* Must be zero */
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uint64_t qos_diff : 1; /* Use IP diffserv to determine */
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/* the queue in the POW */
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uint64_t qos_vlan : 1; /* Use the VLAN tag to determine */
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/* the queue in the POW */
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uint64_t reserved2 : 3; /* Must be zero */
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uint64_t crc_en : 1; /* Enable HW checksum */
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uint64_t reserved1 : 2; /* Must be zero */
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octeon_pip_port_parse_mode_t mode : 2; /* Raw/Parsed/IP/etc */
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uint64_t reserved0 : 1; /* Must be zero */
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uint64_t skip : 7; /* 8 byte words to skip in the */
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/* beginning of a packet buffer */
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} bits;
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} octeon_pip_port_cfg_t;
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/*
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* Packet input to POW interface. How input packets are tagged for
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* the POW is controlled here.
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*/
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typedef union {
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uint64_t word64;
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struct {
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uint64_t reserved : 24; /**< Reserved */
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uint64_t grptagbase : 4; /**< Offset to use when computing group from tag bits
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when GRPTAG is set. Only applies to IP packets.
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(PASS2 only) */
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uint64_t grptagmask : 4; /**< Which bits of the tag to exclude when computing
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group when GRPTAG is set. Only applies to IP packets.
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(PASS2 only) */
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uint64_t grptag : 1; /**< When set, use the lower bit of the tag to compute
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the group in the work queue entry
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GRP = WQE[TAG[3:0]] & ~GRPTAGMASK + GRPTAGBASE.
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Only applies to IP packets. (PASS2 only) */
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uint64_t spare : 1; /**< Spare bit
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(PASS2 only) */
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uint64_t tag_mode : 2; /**< Which tag algorithm to use
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0 = always use tuple tag algorithm
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1 = always use mask tag algorithm
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2 = if packet is IP, use tuple else use mask
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3 = tuple XOR mask
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(PASS2 only) */
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uint64_t inc_vs : 2; /**< determines the VLAN ID (VID) to be included in
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tuple tag when VLAN stacking is detected
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0 = do not include VID in tuple tag generation
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1 = include VID (VLAN0) in hash
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2 = include VID (VLAN1) in hash
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3 = include VID ([VLAN0,VLAN1]) in hash
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(PASS2 only) */
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uint64_t inc_vlan : 1; /**< when set, the VLAN ID is included in tuple tag
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when VLAN stacking is not detected
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0 = do not include VID in tuple tag generation
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1 = include VID in hash
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(PASS2 only) */
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uint64_t inc_prt_flag : 1; /**< sets whether the port is included in tuple tag */
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uint64_t ip6_dprt_flag : 1; /**< sets whether the TCP/UDP dst port is
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included in tuple tag for IPv6 packets */
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uint64_t ip4_dprt_flag : 1; /**< sets whether the TCP/UDP dst port is
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included in tuple tag for IPv4 */
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uint64_t ip6_sprt_flag : 1; /**< sets whether the TCP/UDP src port is
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included in tuple tag for IPv6 packets */
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uint64_t ip4_sprt_flag : 1; /**< sets whether the TCP/UDP src port is
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included in tuple tag for IPv4 */
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uint64_t ip6_nxth_flag : 1; /**< sets whether ipv6 includes next header in tuple
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tag hash */
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uint64_t ip4_pctl_flag : 1; /**< sets whether ipv4 includes protocol in tuple
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tag hash */
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uint64_t ip6_dst_flag : 1; /**< sets whether ipv6 includes dst address in tuple
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tag hash */
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uint64_t ip4_dst_flag : 1; /**< sets whether ipv4 includes dst address in tuple
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tag hash */
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uint64_t ip6_src_flag : 1; /**< sets whether ipv6 includes src address in tuple
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tag hash */
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uint64_t ip4_src_flag : 1; /**< sets whether ipv4 includes src address in tuple
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tag hash */
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uint64_t tcp6_tag_type : 2; /**< sets the tag_type of a TCP packet (IPv6)
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0 = ordered tags
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1 = atomic tags
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2 = Null tags */
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uint64_t tcp4_tag_type : 2; /**< sets the tag_type of a TCP packet (IPv4)
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0 = ordered tags
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1 = atomic tags
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2 = Null tags */
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uint64_t ip6_tag_type : 2; /**< sets whether IPv6 packet tag type
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0 = ordered tags
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1 = atomic tags
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2 = Null tags */
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uint64_t ip4_tag_type : 2; /**< sets whether IPv4 packet tag type
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0 = ordered tags
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1 = atomic tags
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2 = Null tags */
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uint64_t non_tag_type : 2; /**< sets whether non-IP packet tag type
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0 = ordered tags
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1 = atomic tags
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2 = Null tags */
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uint64_t grp : 4; /* POW group for input pkts */
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} bits;
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} octeon_pip_port_tag_cfg_t;
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/**
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* Configure an ethernet input port
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*
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* @param port_num Port number to configure
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* @param port_cfg Port hardware configuration
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* @param port_tag_cfg
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* Port POW tagging configuration
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*/
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static inline void octeon_pip_config_port(u_int port_num,
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octeon_pip_port_cfg_t port_cfg,
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octeon_pip_port_tag_cfg_t port_tag_cfg)
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{
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oct_write64(OCTEON_PIP_PRT_CFGX(port_num), port_cfg.word64);
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oct_write64(OCTEON_PIP_PRT_TAGX(port_num), port_tag_cfg.word64);
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}
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#endif /* __OCTEON_PIP_H__ */
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