c4b1deaf0d
this is is crucial at least for the latter. What happens is that attaching uart(4) to scc(4) causes the SAB 82532 to "receive" something and trigger a SER_INT_RXREADY interrupt, given that at least fast/filter interrupts are already enabled. Prior to r253161, uart_bus_ihand() was set up at this point and handled that condition, i. e. read the RX FIFO and issued a Receive Message Complete. Now, uart_bus_ihand() and uart_intr() are setup after attaching uart(4), leaving the SER_INT_RXREADY interrupt triggered during the latter to be handled by the iclear method. However, with that method not implement, this in turn causes SAB 82532 to not issue any further SER_INT_RXREADY interrupts until the RX FIFO is full again. Thus, 15 received bytes go to nowhere, given that "the other half" of the RX FIFO is used for status information. Hence, implementing sab82532_bfe_iclear() fixes things again. Potentially, the same problem exists for QUICC. - Remove unnecessary __RMAN_RESOURCE_VISIBLE. - Remove a superfluous header. - Use KOBJMETHOD_END. - Mark unused arguments as such. - Remove variables unused after initialization. Reviewed by: marcel (earlier version)
195 lines
5.2 KiB
C
195 lines
5.2 KiB
C
/*-
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* Copyright (c) 2004-2006 Marcel Moolenaar
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <sys/serial.h>
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#include <dev/scc/scc_bfe.h>
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#include <dev/scc/scc_bus.h>
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#include <dev/ic/z8530.h>
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#include "scc_if.h"
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static int z8530_bfe_attach(struct scc_softc *, int);
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static int z8530_bfe_iclear(struct scc_softc *, struct scc_chan *);
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static int z8530_bfe_ipend(struct scc_softc *);
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static int z8530_bfe_probe(struct scc_softc *);
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static kobj_method_t z8530_methods[] = {
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KOBJMETHOD(scc_attach, z8530_bfe_attach),
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KOBJMETHOD(scc_iclear, z8530_bfe_iclear),
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KOBJMETHOD(scc_ipend, z8530_bfe_ipend),
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KOBJMETHOD(scc_probe, z8530_bfe_probe),
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KOBJMETHOD_END
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};
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struct scc_class scc_z8530_class = {
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"z8530 class",
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z8530_methods,
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sizeof(struct scc_softc),
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.cl_channels = 2,
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.cl_class = SCC_CLASS_Z8530,
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.cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC,
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.cl_range = CHAN_B - CHAN_A,
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};
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/* Multiplexed I/O. */
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static __inline void
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scc_setmreg(struct scc_bas *bas, int ch, int reg, int val)
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{
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scc_setreg(bas, ch + REG_CTRL, reg);
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scc_barrier(bas);
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scc_setreg(bas, ch + REG_CTRL, val);
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}
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static __inline uint8_t
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scc_getmreg(struct scc_bas *bas, int ch, int reg)
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{
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scc_setreg(bas, ch + REG_CTRL, reg);
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scc_barrier(bas);
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return (scc_getreg(bas, ch + REG_CTRL));
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}
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static int
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z8530_bfe_attach(struct scc_softc *sc __unused, int reset __unused)
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{
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return (0);
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}
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static int
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z8530_bfe_iclear(struct scc_softc *sc, struct scc_chan *ch)
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{
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struct scc_bas *bas;
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int c;
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bas = &sc->sc_bas;
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c = (ch->ch_nr == 1) ? CHAN_A : CHAN_B;
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mtx_lock_spin(&sc->sc_hwmtx);
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if (ch->ch_ipend & SER_INT_TXIDLE) {
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scc_setreg(bas, c + REG_CTRL, CR_RSTTXI);
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scc_barrier(bas);
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}
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if (ch->ch_ipend & SER_INT_RXREADY) {
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scc_getreg(bas, c + REG_DATA);
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scc_barrier(bas);
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}
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if (ch->ch_ipend & (SER_INT_OVERRUN|SER_INT_BREAK))
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scc_setreg(bas, c + REG_CTRL, CR_RSTERR);
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mtx_unlock_spin(&sc->sc_hwmtx);
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return (0);
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}
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#define SIGCHG(c, i, s, d) \
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if (c) { \
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i |= (i & s) ? s : s | d; \
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} else { \
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i = (i & s) ? (i & ~s) | d : i; \
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}
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static int
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z8530_bfe_ipend(struct scc_softc *sc)
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{
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struct scc_bas *bas;
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struct scc_chan *ch[2];
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uint32_t sig;
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uint8_t bes, ip, src;
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bas = &sc->sc_bas;
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ch[0] = &sc->sc_chan[0];
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ch[1] = &sc->sc_chan[1];
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ch[0]->ch_ipend = 0;
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ch[1]->ch_ipend = 0;
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mtx_lock_spin(&sc->sc_hwmtx);
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ip = scc_getmreg(bas, CHAN_A, RR_IP);
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if (ip & IP_RIA)
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ch[0]->ch_ipend |= SER_INT_RXREADY;
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if (ip & IP_RIB)
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ch[1]->ch_ipend |= SER_INT_RXREADY;
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if (ip & IP_TIA)
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ch[0]->ch_ipend |= SER_INT_TXIDLE;
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if (ip & IP_TIB)
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ch[1]->ch_ipend |= SER_INT_TXIDLE;
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if (ip & IP_SIA) {
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scc_setreg(bas, CHAN_A + REG_CTRL, CR_RSTXSI);
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scc_barrier(bas);
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bes = scc_getreg(bas, CHAN_A + REG_CTRL);
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if (bes & BES_BRK)
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ch[0]->ch_ipend |= SER_INT_BREAK;
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sig = ch[0]->ch_hwsig;
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SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS);
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SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD);
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SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR);
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if (sig & SER_MASK_DELTA) {
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ch[0]->ch_hwsig = sig;
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ch[0]->ch_ipend |= SER_INT_SIGCHG;
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}
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src = scc_getmreg(bas, CHAN_A, RR_SRC);
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if (src & SRC_OVR)
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ch[0]->ch_ipend |= SER_INT_OVERRUN;
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}
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if (ip & IP_SIB) {
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scc_setreg(bas, CHAN_B + REG_CTRL, CR_RSTXSI);
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scc_barrier(bas);
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bes = scc_getreg(bas, CHAN_B + REG_CTRL);
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if (bes & BES_BRK)
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ch[1]->ch_ipend |= SER_INT_BREAK;
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sig = ch[1]->ch_hwsig;
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SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS);
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SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD);
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SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR);
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if (sig & SER_MASK_DELTA) {
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ch[1]->ch_hwsig = sig;
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ch[1]->ch_ipend |= SER_INT_SIGCHG;
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}
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src = scc_getmreg(bas, CHAN_B, RR_SRC);
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if (src & SRC_OVR)
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ch[1]->ch_ipend |= SER_INT_OVERRUN;
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}
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mtx_unlock_spin(&sc->sc_hwmtx);
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return (ch[0]->ch_ipend | ch[1]->ch_ipend);
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}
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static int
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z8530_bfe_probe(struct scc_softc *sc __unused)
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{
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return (0);
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}
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