5c87c606cd
support for AES and OpenBSD's hardware crypto.
638 lines
18 KiB
C
638 lines
18 KiB
C
/* crypto/md32_common.h */
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/* ====================================================================
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* Copyright (c) 1999-2002 The OpenSSL Project. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* 3. All advertising materials mentioning features or use of this
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* software must display the following acknowledgment:
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* "This product includes software developed by the OpenSSL Project
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* for use in the OpenSSL Toolkit. (http://www.OpenSSL.org/)"
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*
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* 4. The names "OpenSSL Toolkit" and "OpenSSL Project" must not be used to
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* endorse or promote products derived from this software without
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* prior written permission. For written permission, please contact
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* licensing@OpenSSL.org.
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*
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* 5. Products derived from this software may not be called "OpenSSL"
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* nor may "OpenSSL" appear in their names without prior written
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* permission of the OpenSSL Project.
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*
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* 6. Redistributions of any form whatsoever must retain the following
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* acknowledgment:
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* "This product includes software developed by the OpenSSL Project
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* for use in the OpenSSL Toolkit (http://www.OpenSSL.org/)"
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*
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* THIS SOFTWARE IS PROVIDED BY THE OpenSSL PROJECT ``AS IS'' AND ANY
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* EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE OpenSSL PROJECT OR
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* ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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* ====================================================================
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*
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* This product includes cryptographic software written by Eric Young
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* (eay@cryptsoft.com). This product includes software written by Tim
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* Hudson (tjh@cryptsoft.com).
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*
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*/
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/*
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* This is a generic 32 bit "collector" for message digest algorithms.
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* Whenever needed it collects input character stream into chunks of
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* 32 bit values and invokes a block function that performs actual hash
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* calculations.
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*
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* Porting guide.
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*
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* Obligatory macros:
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*
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* DATA_ORDER_IS_BIG_ENDIAN or DATA_ORDER_IS_LITTLE_ENDIAN
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* this macro defines byte order of input stream.
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* HASH_CBLOCK
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* size of a unit chunk HASH_BLOCK operates on.
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* HASH_LONG
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* has to be at lest 32 bit wide, if it's wider, then
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* HASH_LONG_LOG2 *has to* be defined along
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* HASH_CTX
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* context structure that at least contains following
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* members:
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* typedef struct {
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* ...
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* HASH_LONG Nl,Nh;
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* HASH_LONG data[HASH_LBLOCK];
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* int num;
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* ...
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* } HASH_CTX;
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* HASH_UPDATE
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* name of "Update" function, implemented here.
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* HASH_TRANSFORM
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* name of "Transform" function, implemented here.
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* HASH_FINAL
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* name of "Final" function, implemented here.
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* HASH_BLOCK_HOST_ORDER
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* name of "block" function treating *aligned* input message
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* in host byte order, implemented externally.
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* HASH_BLOCK_DATA_ORDER
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* name of "block" function treating *unaligned* input message
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* in original (data) byte order, implemented externally (it
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* actually is optional if data and host are of the same
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* "endianess").
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* HASH_MAKE_STRING
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* macro convering context variables to an ASCII hash string.
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*
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* Optional macros:
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*
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* B_ENDIAN or L_ENDIAN
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* defines host byte-order.
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* HASH_LONG_LOG2
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* defaults to 2 if not states otherwise.
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* HASH_LBLOCK
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* assumed to be HASH_CBLOCK/4 if not stated otherwise.
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* HASH_BLOCK_DATA_ORDER_ALIGNED
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* alternative "block" function capable of treating
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* aligned input message in original (data) order,
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* implemented externally.
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*
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* MD5 example:
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*
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* #define DATA_ORDER_IS_LITTLE_ENDIAN
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*
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* #define HASH_LONG MD5_LONG
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* #define HASH_LONG_LOG2 MD5_LONG_LOG2
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* #define HASH_CTX MD5_CTX
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* #define HASH_CBLOCK MD5_CBLOCK
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* #define HASH_LBLOCK MD5_LBLOCK
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* #define HASH_UPDATE MD5_Update
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* #define HASH_TRANSFORM MD5_Transform
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* #define HASH_FINAL MD5_Final
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* #define HASH_BLOCK_HOST_ORDER md5_block_host_order
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* #define HASH_BLOCK_DATA_ORDER md5_block_data_order
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*
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* <appro@fy.chalmers.se>
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*/
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#if !defined(DATA_ORDER_IS_BIG_ENDIAN) && !defined(DATA_ORDER_IS_LITTLE_ENDIAN)
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#error "DATA_ORDER must be defined!"
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#endif
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#ifndef HASH_CBLOCK
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#error "HASH_CBLOCK must be defined!"
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#endif
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#ifndef HASH_LONG
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#error "HASH_LONG must be defined!"
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#endif
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#ifndef HASH_CTX
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#error "HASH_CTX must be defined!"
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#endif
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#ifndef HASH_UPDATE
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#error "HASH_UPDATE must be defined!"
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#endif
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#ifndef HASH_TRANSFORM
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#error "HASH_TRANSFORM must be defined!"
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#endif
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#ifndef HASH_FINAL
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#error "HASH_FINAL must be defined!"
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#endif
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#ifndef HASH_BLOCK_HOST_ORDER
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#error "HASH_BLOCK_HOST_ORDER must be defined!"
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#endif
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#if 0
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/*
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* Moved below as it's required only if HASH_BLOCK_DATA_ORDER_ALIGNED
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* isn't defined.
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*/
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#ifndef HASH_BLOCK_DATA_ORDER
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#error "HASH_BLOCK_DATA_ORDER must be defined!"
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#endif
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#endif
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#ifndef HASH_LBLOCK
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#define HASH_LBLOCK (HASH_CBLOCK/4)
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#endif
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#ifndef HASH_LONG_LOG2
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#define HASH_LONG_LOG2 2
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#endif
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/*
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* Engage compiler specific rotate intrinsic function if available.
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*/
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#undef ROTATE
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#ifndef PEDANTIC
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# if 0 /* defined(_MSC_VER) */
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# define ROTATE(a,n) _lrotl(a,n)
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# elif defined(__MWERKS__)
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# if defined(__POWERPC__)
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# define ROTATE(a,n) __rlwinm(a,n,0,31)
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# elif defined(__MC68K__)
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/* Motorola specific tweak. <appro@fy.chalmers.se> */
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# define ROTATE(a,n) ( n<24 ? __rol(a,n) : __ror(a,32-n) )
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# else
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# define ROTATE(a,n) __rol(a,n)
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# endif
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# elif defined(__GNUC__) && __GNUC__>=2 && !defined(OPENSSL_NO_ASM) && !defined(OPENSSL_NO_INLINE_ASM)
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/*
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* Some GNU C inline assembler templates. Note that these are
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* rotates by *constant* number of bits! But that's exactly
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* what we need here...
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*
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* <appro@fy.chalmers.se>
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*/
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# if defined(__i386) || defined(__i386__) || defined(__x86_64) || defined(__x86_64__)
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# define ROTATE(a,n) ({ register unsigned int ret; \
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asm ( \
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"roll %1,%0" \
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: "=r"(ret) \
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: "I"(n), "0"(a) \
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: "cc"); \
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ret; \
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})
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# elif defined(__powerpc) || defined(__ppc)
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# define ROTATE(a,n) ({ register unsigned int ret; \
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asm ( \
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"rlwinm %0,%1,%2,0,31" \
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: "=r"(ret) \
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: "r"(a), "I"(n)); \
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ret; \
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})
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# endif
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# endif
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/*
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* Engage compiler specific "fetch in reverse byte order"
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* intrinsic function if available.
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*/
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# if defined(__GNUC__) && __GNUC__>=2 && !defined(OPENSSL_NO_ASM) && !defined(OPENSSL_NO_INLINE_ASM)
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/* some GNU C inline assembler templates by <appro@fy.chalmers.se> */
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# if (defined(__i386) || defined(__i386__) || defined(__x86_64) || defined(__x86_64__)) && !defined(I386_ONLY)
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# define BE_FETCH32(a) ({ register unsigned int l=(a);\
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asm ( \
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"bswapl %0" \
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: "=r"(l) : "0"(l)); \
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l; \
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})
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# elif defined(__powerpc)
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# define LE_FETCH32(a) ({ register unsigned int l; \
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asm ( \
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"lwbrx %0,0,%1" \
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: "=r"(l) \
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: "r"(a)); \
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l; \
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})
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# elif defined(__sparc) && defined(OPENSSL_SYS_ULTRASPARC)
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# define LE_FETCH32(a) ({ register unsigned int l; \
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asm ( \
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"lda [%1]#ASI_PRIMARY_LITTLE,%0"\
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: "=r"(l) \
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: "r"(a)); \
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l; \
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})
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# endif
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# endif
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#endif /* PEDANTIC */
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#if HASH_LONG_LOG2==2 /* Engage only if sizeof(HASH_LONG)== 4 */
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/* A nice byte order reversal from Wei Dai <weidai@eskimo.com> */
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#ifdef ROTATE
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/* 5 instructions with rotate instruction, else 9 */
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#define REVERSE_FETCH32(a,l) ( \
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l=*(const HASH_LONG *)(a), \
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((ROTATE(l,8)&0x00FF00FF)|(ROTATE((l&0x00FF00FF),24))) \
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)
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#else
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/* 6 instructions with rotate instruction, else 8 */
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#define REVERSE_FETCH32(a,l) ( \
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l=*(const HASH_LONG *)(a), \
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l=(((l>>8)&0x00FF00FF)|((l&0x00FF00FF)<<8)), \
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ROTATE(l,16) \
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)
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/*
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* Originally the middle line started with l=(((l&0xFF00FF00)>>8)|...
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* It's rewritten as above for two reasons:
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* - RISCs aren't good at long constants and have to explicitely
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* compose 'em with several (well, usually 2) instructions in a
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* register before performing the actual operation and (as you
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* already realized:-) having same constant should inspire the
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* compiler to permanently allocate the only register for it;
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* - most modern CPUs have two ALUs, but usually only one has
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* circuitry for shifts:-( this minor tweak inspires compiler
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* to schedule shift instructions in a better way...
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*
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* <appro@fy.chalmers.se>
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*/
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#endif
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#endif
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#ifndef ROTATE
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#define ROTATE(a,n) (((a)<<(n))|(((a)&0xffffffff)>>(32-(n))))
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#endif
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/*
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* Make some obvious choices. E.g., HASH_BLOCK_DATA_ORDER_ALIGNED
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* and HASH_BLOCK_HOST_ORDER ought to be the same if input data
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* and host are of the same "endianess". It's possible to mask
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* this with blank #define HASH_BLOCK_DATA_ORDER though...
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*
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* <appro@fy.chalmers.se>
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*/
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#if defined(B_ENDIAN)
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# if defined(DATA_ORDER_IS_BIG_ENDIAN)
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# if !defined(HASH_BLOCK_DATA_ORDER_ALIGNED) && HASH_LONG_LOG2==2
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# define HASH_BLOCK_DATA_ORDER_ALIGNED HASH_BLOCK_HOST_ORDER
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# endif
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# elif defined(DATA_ORDER_IS_LITTLE_ENDIAN)
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# ifndef HOST_FETCH32
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# ifdef LE_FETCH32
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# define HOST_FETCH32(p,l) LE_FETCH32(p)
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# elif defined(REVERSE_FETCH32)
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# define HOST_FETCH32(p,l) REVERSE_FETCH32(p,l)
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# endif
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# endif
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# endif
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#elif defined(L_ENDIAN)
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# if defined(DATA_ORDER_IS_LITTLE_ENDIAN)
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# if !defined(HASH_BLOCK_DATA_ORDER_ALIGNED) && HASH_LONG_LOG2==2
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# define HASH_BLOCK_DATA_ORDER_ALIGNED HASH_BLOCK_HOST_ORDER
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# endif
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# elif defined(DATA_ORDER_IS_BIG_ENDIAN)
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# ifndef HOST_FETCH32
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# ifdef BE_FETCH32
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# define HOST_FETCH32(p,l) BE_FETCH32(p)
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# elif defined(REVERSE_FETCH32)
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# define HOST_FETCH32(p,l) REVERSE_FETCH32(p,l)
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# endif
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# endif
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# endif
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#endif
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#if !defined(HASH_BLOCK_DATA_ORDER_ALIGNED)
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#ifndef HASH_BLOCK_DATA_ORDER
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#error "HASH_BLOCK_DATA_ORDER must be defined!"
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#endif
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#endif
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#if defined(DATA_ORDER_IS_BIG_ENDIAN)
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#define HOST_c2l(c,l) (l =(((unsigned long)(*((c)++)))<<24), \
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l|=(((unsigned long)(*((c)++)))<<16), \
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l|=(((unsigned long)(*((c)++)))<< 8), \
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l|=(((unsigned long)(*((c)++))) ), \
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l)
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#define HOST_p_c2l(c,l,n) { \
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switch (n) { \
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case 0: l =((unsigned long)(*((c)++)))<<24; \
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case 1: l|=((unsigned long)(*((c)++)))<<16; \
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case 2: l|=((unsigned long)(*((c)++)))<< 8; \
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case 3: l|=((unsigned long)(*((c)++))); \
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} }
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#define HOST_p_c2l_p(c,l,sc,len) { \
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switch (sc) { \
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case 0: l =((unsigned long)(*((c)++)))<<24; \
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if (--len == 0) break; \
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case 1: l|=((unsigned long)(*((c)++)))<<16; \
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if (--len == 0) break; \
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case 2: l|=((unsigned long)(*((c)++)))<< 8; \
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} }
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/* NOTE the pointer is not incremented at the end of this */
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#define HOST_c2l_p(c,l,n) { \
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l=0; (c)+=n; \
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switch (n) { \
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case 3: l =((unsigned long)(*(--(c))))<< 8; \
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case 2: l|=((unsigned long)(*(--(c))))<<16; \
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case 1: l|=((unsigned long)(*(--(c))))<<24; \
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} }
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#define HOST_l2c(l,c) (*((c)++)=(unsigned char)(((l)>>24)&0xff), \
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*((c)++)=(unsigned char)(((l)>>16)&0xff), \
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*((c)++)=(unsigned char)(((l)>> 8)&0xff), \
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*((c)++)=(unsigned char)(((l) )&0xff), \
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l)
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#elif defined(DATA_ORDER_IS_LITTLE_ENDIAN)
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#define HOST_c2l(c,l) (l =(((unsigned long)(*((c)++))) ), \
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l|=(((unsigned long)(*((c)++)))<< 8), \
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l|=(((unsigned long)(*((c)++)))<<16), \
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l|=(((unsigned long)(*((c)++)))<<24), \
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l)
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#define HOST_p_c2l(c,l,n) { \
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switch (n) { \
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case 0: l =((unsigned long)(*((c)++))); \
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case 1: l|=((unsigned long)(*((c)++)))<< 8; \
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case 2: l|=((unsigned long)(*((c)++)))<<16; \
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case 3: l|=((unsigned long)(*((c)++)))<<24; \
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} }
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#define HOST_p_c2l_p(c,l,sc,len) { \
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switch (sc) { \
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case 0: l =((unsigned long)(*((c)++))); \
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if (--len == 0) break; \
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case 1: l|=((unsigned long)(*((c)++)))<< 8; \
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if (--len == 0) break; \
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case 2: l|=((unsigned long)(*((c)++)))<<16; \
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} }
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/* NOTE the pointer is not incremented at the end of this */
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#define HOST_c2l_p(c,l,n) { \
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l=0; (c)+=n; \
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switch (n) { \
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case 3: l =((unsigned long)(*(--(c))))<<16; \
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case 2: l|=((unsigned long)(*(--(c))))<< 8; \
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case 1: l|=((unsigned long)(*(--(c)))); \
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} }
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#define HOST_l2c(l,c) (*((c)++)=(unsigned char)(((l) )&0xff), \
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*((c)++)=(unsigned char)(((l)>> 8)&0xff), \
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*((c)++)=(unsigned char)(((l)>>16)&0xff), \
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*((c)++)=(unsigned char)(((l)>>24)&0xff), \
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l)
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#endif
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/*
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* Time for some action:-)
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*/
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int HASH_UPDATE (HASH_CTX *c, const void *data_, unsigned long len)
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{
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const unsigned char *data=data_;
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register HASH_LONG * p;
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register unsigned long l;
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int sw,sc,ew,ec;
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if (len==0) return 1;
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l=(c->Nl+(len<<3))&0xffffffffL;
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/* 95-05-24 eay Fixed a bug with the overflow handling, thanks to
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* Wei Dai <weidai@eskimo.com> for pointing it out. */
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if (l < c->Nl) /* overflow */
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c->Nh++;
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c->Nh+=(len>>29);
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c->Nl=l;
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if (c->num != 0)
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{
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p=c->data;
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sw=c->num>>2;
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sc=c->num&0x03;
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if ((c->num+len) >= HASH_CBLOCK)
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{
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l=p[sw]; HOST_p_c2l(data,l,sc); p[sw++]=l;
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for (; sw<HASH_LBLOCK; sw++)
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{
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HOST_c2l(data,l); p[sw]=l;
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}
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HASH_BLOCK_HOST_ORDER (c,p,1);
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len-=(HASH_CBLOCK-c->num);
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c->num=0;
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/* drop through and do the rest */
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}
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else
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{
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c->num+=len;
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if ((sc+len) < 4) /* ugly, add char's to a word */
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{
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l=p[sw]; HOST_p_c2l_p(data,l,sc,len); p[sw]=l;
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}
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else
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{
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ew=(c->num>>2);
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ec=(c->num&0x03);
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if (sc)
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l=p[sw];
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HOST_p_c2l(data,l,sc);
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p[sw++]=l;
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for (; sw < ew; sw++)
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{
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HOST_c2l(data,l); p[sw]=l;
|
|
}
|
|
if (ec)
|
|
{
|
|
HOST_c2l_p(data,l,ec); p[sw]=l;
|
|
}
|
|
}
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
sw=len/HASH_CBLOCK;
|
|
if (sw > 0)
|
|
{
|
|
#if defined(HASH_BLOCK_DATA_ORDER_ALIGNED)
|
|
/*
|
|
* Note that HASH_BLOCK_DATA_ORDER_ALIGNED gets defined
|
|
* only if sizeof(HASH_LONG)==4.
|
|
*/
|
|
if ((((unsigned long)data)%4) == 0)
|
|
{
|
|
/* data is properly aligned so that we can cast it: */
|
|
HASH_BLOCK_DATA_ORDER_ALIGNED (c,(HASH_LONG *)data,sw);
|
|
sw*=HASH_CBLOCK;
|
|
data+=sw;
|
|
len-=sw;
|
|
}
|
|
else
|
|
#if !defined(HASH_BLOCK_DATA_ORDER)
|
|
while (sw--)
|
|
{
|
|
memcpy (p=c->data,data,HASH_CBLOCK);
|
|
HASH_BLOCK_DATA_ORDER_ALIGNED(c,p,1);
|
|
data+=HASH_CBLOCK;
|
|
len-=HASH_CBLOCK;
|
|
}
|
|
#endif
|
|
#endif
|
|
#if defined(HASH_BLOCK_DATA_ORDER)
|
|
{
|
|
HASH_BLOCK_DATA_ORDER(c,data,sw);
|
|
sw*=HASH_CBLOCK;
|
|
data+=sw;
|
|
len-=sw;
|
|
}
|
|
#endif
|
|
}
|
|
|
|
if (len!=0)
|
|
{
|
|
p = c->data;
|
|
c->num = len;
|
|
ew=len>>2; /* words to copy */
|
|
ec=len&0x03;
|
|
for (; ew; ew--,p++)
|
|
{
|
|
HOST_c2l(data,l); *p=l;
|
|
}
|
|
HOST_c2l_p(data,l,ec);
|
|
*p=l;
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
|
|
void HASH_TRANSFORM (HASH_CTX *c, const unsigned char *data)
|
|
{
|
|
#if defined(HASH_BLOCK_DATA_ORDER_ALIGNED)
|
|
if ((((unsigned long)data)%4) == 0)
|
|
/* data is properly aligned so that we can cast it: */
|
|
HASH_BLOCK_DATA_ORDER_ALIGNED (c,(HASH_LONG *)data,1);
|
|
else
|
|
#if !defined(HASH_BLOCK_DATA_ORDER)
|
|
{
|
|
memcpy (c->data,data,HASH_CBLOCK);
|
|
HASH_BLOCK_DATA_ORDER_ALIGNED (c,c->data,1);
|
|
}
|
|
#endif
|
|
#endif
|
|
#if defined(HASH_BLOCK_DATA_ORDER)
|
|
HASH_BLOCK_DATA_ORDER (c,data,1);
|
|
#endif
|
|
}
|
|
|
|
|
|
int HASH_FINAL (unsigned char *md, HASH_CTX *c)
|
|
{
|
|
register HASH_LONG *p;
|
|
register unsigned long l;
|
|
register int i,j;
|
|
static const unsigned char end[4]={0x80,0x00,0x00,0x00};
|
|
const unsigned char *cp=end;
|
|
|
|
/* c->num should definitly have room for at least one more byte. */
|
|
p=c->data;
|
|
i=c->num>>2;
|
|
j=c->num&0x03;
|
|
|
|
#if 0
|
|
/* purify often complains about the following line as an
|
|
* Uninitialized Memory Read. While this can be true, the
|
|
* following p_c2l macro will reset l when that case is true.
|
|
* This is because j&0x03 contains the number of 'valid' bytes
|
|
* already in p[i]. If and only if j&0x03 == 0, the UMR will
|
|
* occur but this is also the only time p_c2l will do
|
|
* l= *(cp++) instead of l|= *(cp++)
|
|
* Many thanks to Alex Tang <altitude@cic.net> for pickup this
|
|
* 'potential bug' */
|
|
#ifdef PURIFY
|
|
if (j==0) p[i]=0; /* Yeah, but that's not the way to fix it:-) */
|
|
#endif
|
|
l=p[i];
|
|
#else
|
|
l = (j==0) ? 0 : p[i];
|
|
#endif
|
|
HOST_p_c2l(cp,l,j); p[i++]=l; /* i is the next 'undefined word' */
|
|
|
|
if (i>(HASH_LBLOCK-2)) /* save room for Nl and Nh */
|
|
{
|
|
if (i<HASH_LBLOCK) p[i]=0;
|
|
HASH_BLOCK_HOST_ORDER (c,p,1);
|
|
i=0;
|
|
}
|
|
for (; i<(HASH_LBLOCK-2); i++)
|
|
p[i]=0;
|
|
|
|
#if defined(DATA_ORDER_IS_BIG_ENDIAN)
|
|
p[HASH_LBLOCK-2]=c->Nh;
|
|
p[HASH_LBLOCK-1]=c->Nl;
|
|
#elif defined(DATA_ORDER_IS_LITTLE_ENDIAN)
|
|
p[HASH_LBLOCK-2]=c->Nl;
|
|
p[HASH_LBLOCK-1]=c->Nh;
|
|
#endif
|
|
HASH_BLOCK_HOST_ORDER (c,p,1);
|
|
|
|
#ifndef HASH_MAKE_STRING
|
|
#error "HASH_MAKE_STRING must be defined!"
|
|
#else
|
|
HASH_MAKE_STRING(c,md);
|
|
#endif
|
|
|
|
c->num=0;
|
|
/* clear stuff, HASH_BLOCK may be leaving some stuff on the stack
|
|
* but I'm not worried :-)
|
|
OPENSSL_cleanse((void *)c,sizeof(HASH_CTX));
|
|
*/
|
|
return 1;
|
|
}
|
|
|
|
#ifndef MD32_REG_T
|
|
#define MD32_REG_T long
|
|
/*
|
|
* This comment was originaly written for MD5, which is why it
|
|
* discusses A-D. But it basically applies to all 32-bit digests,
|
|
* which is why it was moved to common header file.
|
|
*
|
|
* In case you wonder why A-D are declared as long and not
|
|
* as MD5_LONG. Doing so results in slight performance
|
|
* boost on LP64 architectures. The catch is we don't
|
|
* really care if 32 MSBs of a 64-bit register get polluted
|
|
* with eventual overflows as we *save* only 32 LSBs in
|
|
* *either* case. Now declaring 'em long excuses the compiler
|
|
* from keeping 32 MSBs zeroed resulting in 13% performance
|
|
* improvement under SPARC Solaris7/64 and 5% under AlphaLinux.
|
|
* Well, to be honest it should say that this *prevents*
|
|
* performance degradation.
|
|
* <appro@fy.chalmers.se>
|
|
* Apparently there're LP64 compilers that generate better
|
|
* code if A-D are declared int. Most notably GCC-x86_64
|
|
* generates better code.
|
|
* <appro@fy.chalmers.se>
|
|
*/
|
|
#endif
|