60ba692c78
Use per-CPU structure to store HW watchpoints registers state for each CPU present in the system. Those registers will be restored upon wake up from the STOP state if requested by the debug_monitor code. The method is similar to the one introduced to AMD64. We store all possible 16 registers for HW watchpoints (maximum allowed by the architecture). HW breakpoints are not maintained since they are used for single stepping only. Pointed out by: kib Reviewed by: wma No strong objections from: kib Submitted by: Zbigniew Bodek <zbb@semihalf.com> Obtained from: Semihalf Sponsored by: Juniper Networks Inc. Differential Revision: https://reviews.freebsd.org/D4338
134 lines
3.4 KiB
C
134 lines
3.4 KiB
C
/*-
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* Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: FreeBSD: src/sys/i386/include/globaldata.h,v 1.27 2001/04/27
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* $FreeBSD$
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*/
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#ifndef _MACHINE_PCPU_H_
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#define _MACHINE_PCPU_H_
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#ifdef _KERNEL
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#include <machine/acle-compat.h>
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#include <machine/cpuconf.h>
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#define ALT_STACK_SIZE 128
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struct vmspace;
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#endif /* _KERNEL */
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#if __ARM_ARCH >= 6
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#define PCPU_MD_FIELDS \
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unsigned int pc_vfpsid; \
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unsigned int pc_vfpmvfr0; \
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unsigned int pc_vfpmvfr1; \
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struct pmap *pc_curpmap; \
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vm_offset_t pc_qmap_addr; \
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void *pc_qmap_pte; \
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unsigned int pc_dbreg[32]; \
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int pc_dbreg_cmd; \
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char __pad[1]
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#else
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#define PCPU_MD_FIELDS \
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vm_offset_t qmap_addr; \
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void *pc_qmap_pte; \
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char __pad[149]
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#endif
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#ifdef _KERNEL
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#define PC_DBREG_CMD_NONE 0
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#define PC_DBREG_CMD_LOAD 1
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struct pcb;
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struct pcpu;
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extern struct pcpu *pcpup;
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#if __ARM_ARCH >= 6
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#define CPU_MASK (0xf)
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#ifndef SMP
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#define get_pcpu() (pcpup)
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#else
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#define get_pcpu() __extension__ ({ \
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int id; \
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__asm __volatile("mrc p15, 0, %0, c0, c0, 5" : "=r" (id)); \
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(pcpup + (id & CPU_MASK)); \
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})
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#endif
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static inline struct thread *
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get_curthread(void)
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{
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void *ret;
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__asm __volatile("mrc p15, 0, %0, c13, c0, 4" : "=r" (ret));
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return (ret);
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}
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static inline void
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set_curthread(struct thread *td)
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{
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__asm __volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (td));
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}
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static inline void *
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get_tls(void)
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{
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void *tls;
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__asm __volatile("mrc p15, 0, %0, c13, c0, 3" : "=r" (tls));
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return (tls);
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}
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static inline void
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set_tls(void *tls)
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{
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__asm __volatile("mcr p15, 0, %0, c13, c0, 3" : : "r" (tls));
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}
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#define curthread get_curthread()
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#else
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#define get_pcpu() pcpup
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#endif
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#define PCPU_GET(member) (get_pcpu()->pc_ ## member)
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#define PCPU_ADD(member, value) (get_pcpu()->pc_ ## member += (value))
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#define PCPU_INC(member) PCPU_ADD(member, 1)
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#define PCPU_PTR(member) (&get_pcpu()->pc_ ## member)
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#define PCPU_SET(member,value) (get_pcpu()->pc_ ## member = (value))
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void pcpu0_init(void);
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#endif /* _KERNEL */
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#endif /* !_MACHINE_PCPU_H_ */
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