1242 lines
32 KiB
C
1242 lines
32 KiB
C
/******************************************************************************
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* xen_intr.c
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*
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* Xen event and interrupt services for x86 PV and HVM guests.
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*
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* Copyright (c) 2002-2005, K A Fraser
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* Copyright (c) 2005, Intel Corporation <xiaofeng.ling@intel.com>
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* Copyright (c) 2012, Spectra Logic Corporation
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*
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* This file may be distributed separately from the Linux kernel, or
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* incorporated into other software packages, subject to the following license:
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this source file (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy, modify,
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* merge, publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/limits.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/interrupt.h>
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#include <sys/pcpu.h>
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#include <sys/smp.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/intr_machdep.h>
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#include <x86/apicvar.h>
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#include <machine/smp.h>
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#include <machine/stdarg.h>
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#include <machine/xen/synch_bitops.h>
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#include <machine/xen/xen-os.h>
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#include <machine/xen/xenvar.h>
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#include <xen/hypervisor.h>
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#include <xen/xen_intr.h>
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#include <xen/evtchn/evtchnvar.h>
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#include <dev/xen/xenpci/xenpcivar.h>
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static MALLOC_DEFINE(M_XENINTR, "xen_intr", "Xen Interrupt Services");
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/**
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* Per-cpu event channel processing state.
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*/
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struct xen_intr_pcpu_data {
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/**
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* The last event channel bitmap section (level one bit) processed.
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* This is used to ensure we scan all ports before
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* servicing an already servied port again.
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*/
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u_int last_processed_l1i;
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/**
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* The last event channel processed within the event channel
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* bitmap being scanned.
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*/
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u_int last_processed_l2i;
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/** Pointer to this CPU's interrupt statistic counter. */
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u_long *evtchn_intrcnt;
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/**
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* A bitmap of ports that can be serviced from this CPU.
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* A set bit means interrupt handling is enabled.
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*/
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u_long evtchn_enabled[sizeof(u_long) * 8];
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};
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/*
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* Start the scan at port 0 by initializing the last scanned
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* location as the highest numbered event channel port.
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*/
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DPCPU_DEFINE(struct xen_intr_pcpu_data, xen_intr_pcpu) = {
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.last_processed_l1i = LONG_BIT - 1,
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.last_processed_l2i = LONG_BIT - 1
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};
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DPCPU_DECLARE(struct vcpu_info *, vcpu_info);
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#define is_valid_evtchn(x) ((x) != 0)
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struct xenisrc {
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struct intsrc xi_intsrc;
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enum evtchn_type xi_type;
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int xi_cpu; /* VCPU for delivery. */
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int xi_vector; /* Global isrc vector number. */
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evtchn_port_t xi_port;
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int xi_pirq;
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int xi_virq;
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u_int xi_close:1; /* close on unbind? */
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u_int xi_needs_eoi:1;
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u_int xi_shared:1; /* Shared with other domains. */
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};
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#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
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static void xen_intr_suspend(struct pic *);
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static void xen_intr_resume(struct pic *, bool suspend_cancelled);
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static void xen_intr_enable_source(struct intsrc *isrc);
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static void xen_intr_disable_source(struct intsrc *isrc, int eoi);
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static void xen_intr_eoi_source(struct intsrc *isrc);
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static void xen_intr_enable_intr(struct intsrc *isrc);
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static void xen_intr_disable_intr(struct intsrc *isrc);
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static int xen_intr_vector(struct intsrc *isrc);
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static int xen_intr_source_pending(struct intsrc *isrc);
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static int xen_intr_config_intr(struct intsrc *isrc,
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enum intr_trigger trig, enum intr_polarity pol);
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static int xen_intr_assign_cpu(struct intsrc *isrc, u_int apic_id);
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static void xen_intr_pirq_enable_source(struct intsrc *isrc);
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static void xen_intr_pirq_disable_source(struct intsrc *isrc, int eoi);
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static void xen_intr_pirq_eoi_source(struct intsrc *isrc);
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static void xen_intr_pirq_enable_intr(struct intsrc *isrc);
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/**
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* PIC interface for all event channel port types except physical IRQs.
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*/
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struct pic xen_intr_pic = {
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.pic_enable_source = xen_intr_enable_source,
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.pic_disable_source = xen_intr_disable_source,
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.pic_eoi_source = xen_intr_eoi_source,
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.pic_enable_intr = xen_intr_enable_intr,
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.pic_disable_intr = xen_intr_disable_intr,
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.pic_vector = xen_intr_vector,
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.pic_source_pending = xen_intr_source_pending,
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.pic_suspend = xen_intr_suspend,
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.pic_resume = xen_intr_resume,
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.pic_config_intr = xen_intr_config_intr,
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.pic_assign_cpu = xen_intr_assign_cpu
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};
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/**
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* PIC interface for all event channel representing
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* physical interrupt sources.
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*/
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struct pic xen_intr_pirq_pic = {
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.pic_enable_source = xen_intr_pirq_enable_source,
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.pic_disable_source = xen_intr_pirq_disable_source,
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.pic_eoi_source = xen_intr_pirq_eoi_source,
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.pic_enable_intr = xen_intr_pirq_enable_intr,
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.pic_disable_intr = xen_intr_disable_intr,
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.pic_vector = xen_intr_vector,
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.pic_source_pending = xen_intr_source_pending,
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.pic_suspend = xen_intr_suspend,
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.pic_resume = xen_intr_resume,
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.pic_config_intr = xen_intr_config_intr,
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.pic_assign_cpu = xen_intr_assign_cpu
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};
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static struct mtx xen_intr_isrc_lock;
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static int xen_intr_isrc_count;
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static struct xenisrc *xen_intr_port_to_isrc[NR_EVENT_CHANNELS];
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/*------------------------- Private Functions --------------------------------*/
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/**
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* Disable signal delivery for an event channel port on the
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* specified CPU.
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*
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* \param port The event channel port to mask.
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*
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* This API is used to manage the port<=>CPU binding of event
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* channel handlers.
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*
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* \note This operation does not preclude reception of an event
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* for this event channel on another CPU. To mask the
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* event channel globally, use evtchn_mask().
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*/
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static inline void
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evtchn_cpu_mask_port(u_int cpu, evtchn_port_t port)
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{
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struct xen_intr_pcpu_data *pcpu;
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pcpu = DPCPU_ID_PTR(cpu, xen_intr_pcpu);
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clear_bit(port, pcpu->evtchn_enabled);
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}
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/**
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* Enable signal delivery for an event channel port on the
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* specified CPU.
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*
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* \param port The event channel port to unmask.
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*
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* This API is used to manage the port<=>CPU binding of event
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* channel handlers.
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*
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* \note This operation does not guarantee that event delivery
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* is enabled for this event channel port. The port must
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* also be globally enabled. See evtchn_unmask().
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*/
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static inline void
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evtchn_cpu_unmask_port(u_int cpu, evtchn_port_t port)
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{
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struct xen_intr_pcpu_data *pcpu;
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pcpu = DPCPU_ID_PTR(cpu, xen_intr_pcpu);
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set_bit(port, pcpu->evtchn_enabled);
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}
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/**
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* Allocate and register a per-cpu Xen upcall interrupt counter.
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*
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* \param cpu The cpu for which to register this interrupt count.
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*/
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static void
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xen_intr_intrcnt_add(u_int cpu)
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{
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char buf[MAXCOMLEN + 1];
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struct xen_intr_pcpu_data *pcpu;
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pcpu = DPCPU_ID_PTR(cpu, xen_intr_pcpu);
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if (pcpu->evtchn_intrcnt != NULL)
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return;
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snprintf(buf, sizeof(buf), "cpu%d:xen", cpu);
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intrcnt_add(buf, &pcpu->evtchn_intrcnt);
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}
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/**
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* Search for an already allocated but currently unused Xen interrupt
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* source object.
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*
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* \param type Restrict the search to interrupt sources of the given
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* type.
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*
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* \return A pointer to a free Xen interrupt source object or NULL.
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*/
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static struct xenisrc *
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xen_intr_find_unused_isrc(enum evtchn_type type)
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{
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int isrc_idx;
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KASSERT(mtx_owned(&xen_intr_isrc_lock), ("Evtchn isrc lock not held"));
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for (isrc_idx = 0; isrc_idx < xen_intr_isrc_count; isrc_idx ++) {
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struct xenisrc *isrc;
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u_int vector;
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vector = FIRST_EVTCHN_INT + isrc_idx;
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isrc = (struct xenisrc *)intr_lookup_source(vector);
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if (isrc != NULL
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&& isrc->xi_type == EVTCHN_TYPE_UNBOUND) {
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KASSERT(isrc->xi_intsrc.is_handlers == 0,
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("Free evtchn still has handlers"));
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isrc->xi_type = type;
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return (isrc);
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}
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}
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return (NULL);
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}
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/**
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* Allocate a Xen interrupt source object.
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*
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* \param type The type of interrupt source to create.
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*
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* \return A pointer to a newly allocated Xen interrupt source
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* object or NULL.
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*/
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static struct xenisrc *
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xen_intr_alloc_isrc(enum evtchn_type type)
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{
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static int warned;
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struct xenisrc *isrc;
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int vector;
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KASSERT(mtx_owned(&xen_intr_isrc_lock), ("Evtchn alloc lock not held"));
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if (xen_intr_isrc_count > NR_EVENT_CHANNELS) {
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if (!warned) {
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warned = 1;
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printf("xen_intr_alloc: Event channels exhausted.\n");
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}
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return (NULL);
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}
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vector = FIRST_EVTCHN_INT + xen_intr_isrc_count;
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xen_intr_isrc_count++;
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mtx_unlock(&xen_intr_isrc_lock);
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isrc = malloc(sizeof(*isrc), M_XENINTR, M_WAITOK | M_ZERO);
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isrc->xi_intsrc.is_pic = &xen_intr_pic;
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isrc->xi_vector = vector;
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isrc->xi_type = type;
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intr_register_source(&isrc->xi_intsrc);
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mtx_lock(&xen_intr_isrc_lock);
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return (isrc);
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}
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/**
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* Attempt to free an active Xen interrupt source object.
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*
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* \param isrc The interrupt source object to release.
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*
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* \returns EBUSY if the source is still in use, otherwise 0.
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*/
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static int
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xen_intr_release_isrc(struct xenisrc *isrc)
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{
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mtx_lock(&xen_intr_isrc_lock);
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if (isrc->xi_intsrc.is_handlers != 0) {
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mtx_unlock(&xen_intr_isrc_lock);
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return (EBUSY);
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}
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evtchn_mask_port(isrc->xi_port);
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evtchn_clear_port(isrc->xi_port);
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/* Rebind port to CPU 0. */
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evtchn_cpu_mask_port(isrc->xi_cpu, isrc->xi_port);
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evtchn_cpu_unmask_port(0, isrc->xi_port);
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if (isrc->xi_close != 0 && is_valid_evtchn(isrc->xi_port)) {
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struct evtchn_close close = { .port = isrc->xi_port };
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if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close))
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panic("EVTCHNOP_close failed");
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}
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xen_intr_port_to_isrc[isrc->xi_port] = NULL;
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isrc->xi_cpu = 0;
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isrc->xi_type = EVTCHN_TYPE_UNBOUND;
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isrc->xi_port = 0;
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mtx_unlock(&xen_intr_isrc_lock);
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return (0);
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}
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/**
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* Associate an interrupt handler with an already allocated local Xen
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* event channel port.
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*
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* \param isrcp The returned Xen interrupt object associated with
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* the specified local port.
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* \param local_port The event channel to bind.
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* \param type The event channel type of local_port.
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* \param intr_owner The device making this bind request.
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* \param filter An interrupt filter handler. Specify NULL
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* to always dispatch to the ithread handler.
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* \param handler An interrupt ithread handler. Optional (can
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* specify NULL) if all necessary event actions
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* are performed by filter.
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* \param arg Argument to present to both filter and handler.
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* \param irqflags Interrupt handler flags. See sys/bus.h.
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* \param handlep Pointer to an opaque handle used to manage this
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* registration.
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*
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* \returns 0 on success, otherwise an errno.
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*/
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static int
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xen_intr_bind_isrc(struct xenisrc **isrcp, evtchn_port_t local_port,
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enum evtchn_type type, device_t intr_owner, driver_filter_t filter,
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driver_intr_t handler, void *arg, enum intr_type flags,
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xen_intr_handle_t *port_handlep)
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{
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struct xenisrc *isrc;
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int error;
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*isrcp = NULL;
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if (port_handlep == NULL) {
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device_printf(intr_owner,
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"xen_intr_bind_isrc: Bad event handle\n");
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return (EINVAL);
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}
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mtx_lock(&xen_intr_isrc_lock);
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isrc = xen_intr_find_unused_isrc(type);
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if (isrc == NULL) {
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isrc = xen_intr_alloc_isrc(type);
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if (isrc == NULL) {
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mtx_unlock(&xen_intr_isrc_lock);
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return (ENOSPC);
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}
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}
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isrc->xi_port = local_port;
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xen_intr_port_to_isrc[local_port] = isrc;
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mtx_unlock(&xen_intr_isrc_lock);
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error = intr_add_handler(device_get_nameunit(intr_owner),
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isrc->xi_vector, filter, handler, arg,
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flags|INTR_EXCL, port_handlep);
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if (error != 0) {
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device_printf(intr_owner,
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"xen_intr_bind_irq: intr_add_handler failed\n");
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xen_intr_release_isrc(isrc);
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return (error);
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}
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*isrcp = isrc;
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evtchn_unmask_port(local_port);
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return (0);
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}
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/**
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* Lookup a Xen interrupt source object given an interrupt binding handle.
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*
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* \param handle A handle initialized by a previous call to
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* xen_intr_bind_isrc().
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*
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* \returns A pointer to the Xen interrupt source object associated
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* with the given interrupt handle. NULL if no association
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* currently exists.
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*/
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static struct xenisrc *
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xen_intr_isrc(xen_intr_handle_t handle)
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{
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struct intr_handler *ih;
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ih = handle;
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if (ih == NULL || ih->ih_event == NULL)
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return (NULL);
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return (ih->ih_event->ie_source);
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}
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/**
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* Determine the event channel ports at the given section of the
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* event port bitmap which have pending events for the given cpu.
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*
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* \param pcpu The Xen interrupt pcpu data for the cpu being querried.
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* \param sh The Xen shared info area.
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* \param idx The index of the section of the event channel bitmap to
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* inspect.
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*
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* \returns A u_long with bits set for every event channel with pending
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* events.
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*/
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static inline u_long
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xen_intr_active_ports(struct xen_intr_pcpu_data *pcpu, shared_info_t *sh,
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u_int idx)
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{
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return (sh->evtchn_pending[idx]
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& ~sh->evtchn_mask[idx]
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& pcpu->evtchn_enabled[idx]);
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}
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/**
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* Interrupt handler for processing all Xen event channel events.
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*
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* \param trap_frame The trap frame context for the current interrupt.
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*/
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void
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xen_intr_handle_upcall(struct trapframe *trap_frame)
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{
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u_int l1i, l2i, port, cpu;
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u_long masked_l1, masked_l2;
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struct xenisrc *isrc;
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shared_info_t *s;
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vcpu_info_t *v;
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struct xen_intr_pcpu_data *pc;
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u_long l1, l2;
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/*
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* Disable preemption in order to always check and fire events
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* on the right vCPU
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*/
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critical_enter();
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cpu = PCPU_GET(cpuid);
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pc = DPCPU_PTR(xen_intr_pcpu);
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s = HYPERVISOR_shared_info;
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v = DPCPU_GET(vcpu_info);
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if (xen_hvm_domain() && !xen_vector_callback_enabled) {
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KASSERT((cpu == 0), ("Fired PCI event callback on wrong CPU"));
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}
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v->evtchn_upcall_pending = 0;
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#if 0
|
|
#ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
|
|
/* Clear master flag /before/ clearing selector flag. */
|
|
wmb();
|
|
#endif
|
|
#endif
|
|
|
|
l1 = atomic_readandclear_long(&v->evtchn_pending_sel);
|
|
|
|
l1i = pc->last_processed_l1i;
|
|
l2i = pc->last_processed_l2i;
|
|
(*pc->evtchn_intrcnt)++;
|
|
|
|
while (l1 != 0) {
|
|
|
|
l1i = (l1i + 1) % LONG_BIT;
|
|
masked_l1 = l1 & ((~0UL) << l1i);
|
|
|
|
if (masked_l1 == 0) {
|
|
/*
|
|
* if we masked out all events, wrap around
|
|
* to the beginning.
|
|
*/
|
|
l1i = LONG_BIT - 1;
|
|
l2i = LONG_BIT - 1;
|
|
continue;
|
|
}
|
|
l1i = ffsl(masked_l1) - 1;
|
|
|
|
do {
|
|
l2 = xen_intr_active_ports(pc, s, l1i);
|
|
|
|
l2i = (l2i + 1) % LONG_BIT;
|
|
masked_l2 = l2 & ((~0UL) << l2i);
|
|
|
|
if (masked_l2 == 0) {
|
|
/* if we masked out all events, move on */
|
|
l2i = LONG_BIT - 1;
|
|
break;
|
|
}
|
|
l2i = ffsl(masked_l2) - 1;
|
|
|
|
/* process port */
|
|
port = (l1i * LONG_BIT) + l2i;
|
|
synch_clear_bit(port, &s->evtchn_pending[0]);
|
|
|
|
isrc = xen_intr_port_to_isrc[port];
|
|
if (__predict_false(isrc == NULL))
|
|
continue;
|
|
|
|
/* Make sure we are firing on the right vCPU */
|
|
KASSERT((isrc->xi_cpu == PCPU_GET(cpuid)),
|
|
("Received unexpected event on vCPU#%d, event bound to vCPU#%d",
|
|
PCPU_GET(cpuid), isrc->xi_cpu));
|
|
|
|
intr_execute_handlers(&isrc->xi_intsrc, trap_frame);
|
|
|
|
/*
|
|
* If this is the final port processed,
|
|
* we'll pick up here+1 next time.
|
|
*/
|
|
pc->last_processed_l1i = l1i;
|
|
pc->last_processed_l2i = l2i;
|
|
|
|
} while (l2i != LONG_BIT - 1);
|
|
|
|
l2 = xen_intr_active_ports(pc, s, l1i);
|
|
if (l2 == 0) {
|
|
/*
|
|
* We handled all ports, so we can clear the
|
|
* selector bit.
|
|
*/
|
|
l1 &= ~(1UL << l1i);
|
|
}
|
|
}
|
|
critical_exit();
|
|
}
|
|
|
|
static int
|
|
xen_intr_init(void *dummy __unused)
|
|
{
|
|
struct xen_intr_pcpu_data *pcpu;
|
|
int i;
|
|
|
|
if (!xen_domain())
|
|
return (0);
|
|
|
|
mtx_init(&xen_intr_isrc_lock, "xen-irq-lock", NULL, MTX_DEF);
|
|
|
|
/*
|
|
* Register interrupt count manually as we aren't
|
|
* guaranteed to see a call to xen_intr_assign_cpu()
|
|
* before our first interrupt. Also set the per-cpu
|
|
* mask of CPU#0 to enable all, since by default
|
|
* all event channels are bound to CPU#0.
|
|
*/
|
|
CPU_FOREACH(i) {
|
|
pcpu = DPCPU_ID_PTR(i, xen_intr_pcpu);
|
|
memset(pcpu->evtchn_enabled, i == 0 ? ~0 : 0,
|
|
sizeof(pcpu->evtchn_enabled));
|
|
xen_intr_intrcnt_add(i);
|
|
}
|
|
|
|
intr_register_pic(&xen_intr_pic);
|
|
|
|
return (0);
|
|
}
|
|
SYSINIT(xen_intr_init, SI_SUB_INTR, SI_ORDER_MIDDLE, xen_intr_init, NULL);
|
|
|
|
/*--------------------------- Common PIC Functions ---------------------------*/
|
|
/**
|
|
* Prepare this PIC for system suspension.
|
|
*/
|
|
static void
|
|
xen_intr_suspend(struct pic *unused)
|
|
{
|
|
}
|
|
|
|
static void
|
|
xen_rebind_ipi(struct xenisrc *isrc)
|
|
{
|
|
#ifdef SMP
|
|
int cpu = isrc->xi_cpu;
|
|
int vcpu_id = pcpu_find(cpu)->pc_vcpu_id;
|
|
int error;
|
|
struct evtchn_bind_ipi bind_ipi = { .vcpu = vcpu_id };
|
|
|
|
error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
|
|
&bind_ipi);
|
|
if (error != 0)
|
|
panic("unable to rebind xen IPI: %d", error);
|
|
|
|
isrc->xi_port = bind_ipi.port;
|
|
isrc->xi_cpu = 0;
|
|
xen_intr_port_to_isrc[bind_ipi.port] = isrc;
|
|
|
|
error = xen_intr_assign_cpu(&isrc->xi_intsrc,
|
|
cpu_apic_ids[cpu]);
|
|
if (error)
|
|
panic("unable to bind xen IPI to CPU#%d: %d",
|
|
cpu, error);
|
|
|
|
evtchn_unmask_port(bind_ipi.port);
|
|
#else
|
|
panic("Resume IPI event channel on UP");
|
|
#endif
|
|
}
|
|
|
|
static void
|
|
xen_rebind_virq(struct xenisrc *isrc)
|
|
{
|
|
int cpu = isrc->xi_cpu;
|
|
int vcpu_id = pcpu_find(cpu)->pc_vcpu_id;
|
|
int error;
|
|
struct evtchn_bind_virq bind_virq = { .virq = isrc->xi_virq,
|
|
.vcpu = vcpu_id };
|
|
|
|
error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
|
|
&bind_virq);
|
|
if (error != 0)
|
|
panic("unable to rebind xen VIRQ#%d: %d", isrc->xi_virq, error);
|
|
|
|
isrc->xi_port = bind_virq.port;
|
|
isrc->xi_cpu = 0;
|
|
xen_intr_port_to_isrc[bind_virq.port] = isrc;
|
|
|
|
#ifdef SMP
|
|
error = xen_intr_assign_cpu(&isrc->xi_intsrc,
|
|
cpu_apic_ids[cpu]);
|
|
if (error)
|
|
panic("unable to bind xen VIRQ#%d to CPU#%d: %d",
|
|
isrc->xi_virq, cpu, error);
|
|
#endif
|
|
|
|
evtchn_unmask_port(bind_virq.port);
|
|
}
|
|
|
|
/**
|
|
* Return this PIC to service after being suspended.
|
|
*/
|
|
static void
|
|
xen_intr_resume(struct pic *unused, bool suspend_cancelled)
|
|
{
|
|
shared_info_t *s = HYPERVISOR_shared_info;
|
|
struct xenisrc *isrc;
|
|
u_int isrc_idx;
|
|
int i;
|
|
|
|
if (suspend_cancelled)
|
|
return;
|
|
|
|
/* Reset the per-CPU masks */
|
|
CPU_FOREACH(i) {
|
|
struct xen_intr_pcpu_data *pcpu;
|
|
|
|
pcpu = DPCPU_ID_PTR(i, xen_intr_pcpu);
|
|
memset(pcpu->evtchn_enabled,
|
|
i == 0 ? ~0 : 0, sizeof(pcpu->evtchn_enabled));
|
|
}
|
|
|
|
/* Mask all event channels. */
|
|
for (i = 0; i < nitems(s->evtchn_mask); i++)
|
|
atomic_store_rel_long(&s->evtchn_mask[i], ~0);
|
|
|
|
/* Remove port -> isrc mappings */
|
|
memset(xen_intr_port_to_isrc, 0, sizeof(xen_intr_port_to_isrc));
|
|
|
|
/* Free unused isrcs and rebind VIRQs and IPIs */
|
|
for (isrc_idx = 0; isrc_idx < xen_intr_isrc_count; isrc_idx++) {
|
|
u_int vector;
|
|
|
|
vector = FIRST_EVTCHN_INT + isrc_idx;
|
|
isrc = (struct xenisrc *)intr_lookup_source(vector);
|
|
if (isrc != NULL) {
|
|
isrc->xi_port = 0;
|
|
switch (isrc->xi_type) {
|
|
case EVTCHN_TYPE_IPI:
|
|
xen_rebind_ipi(isrc);
|
|
break;
|
|
case EVTCHN_TYPE_VIRQ:
|
|
xen_rebind_virq(isrc);
|
|
break;
|
|
default:
|
|
isrc->xi_cpu = 0;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/**
|
|
* Disable a Xen interrupt source.
|
|
*
|
|
* \param isrc The interrupt source to disable.
|
|
*/
|
|
static void
|
|
xen_intr_disable_intr(struct intsrc *base_isrc)
|
|
{
|
|
struct xenisrc *isrc = (struct xenisrc *)base_isrc;
|
|
|
|
evtchn_mask_port(isrc->xi_port);
|
|
}
|
|
|
|
/**
|
|
* Determine the global interrupt vector number for
|
|
* a Xen interrupt source.
|
|
*
|
|
* \param isrc The interrupt source to query.
|
|
*
|
|
* \return The vector number corresponding to the given interrupt source.
|
|
*/
|
|
static int
|
|
xen_intr_vector(struct intsrc *base_isrc)
|
|
{
|
|
struct xenisrc *isrc = (struct xenisrc *)base_isrc;
|
|
|
|
return (isrc->xi_vector);
|
|
}
|
|
|
|
/**
|
|
* Determine whether or not interrupt events are pending on the
|
|
* the given interrupt source.
|
|
*
|
|
* \param isrc The interrupt source to query.
|
|
*
|
|
* \returns 0 if no events are pending, otherwise non-zero.
|
|
*/
|
|
static int
|
|
xen_intr_source_pending(struct intsrc *isrc)
|
|
{
|
|
/*
|
|
* EventChannels are edge triggered and never masked.
|
|
* There can be no pending events.
|
|
*/
|
|
return (0);
|
|
}
|
|
|
|
/**
|
|
* Perform configuration of an interrupt source.
|
|
*
|
|
* \param isrc The interrupt source to configure.
|
|
* \param trig Edge or level.
|
|
* \param pol Active high or low.
|
|
*
|
|
* \returns 0 if no events are pending, otherwise non-zero.
|
|
*/
|
|
static int
|
|
xen_intr_config_intr(struct intsrc *isrc, enum intr_trigger trig,
|
|
enum intr_polarity pol)
|
|
{
|
|
/* Configuration is only possible via the evtchn apis. */
|
|
return (ENODEV);
|
|
}
|
|
|
|
/**
|
|
* Configure CPU affinity for interrupt source event delivery.
|
|
*
|
|
* \param isrc The interrupt source to configure.
|
|
* \param apic_id The apic id of the CPU for handling future events.
|
|
*
|
|
* \returns 0 if successful, otherwise an errno.
|
|
*/
|
|
static int
|
|
xen_intr_assign_cpu(struct intsrc *base_isrc, u_int apic_id)
|
|
{
|
|
#ifdef SMP
|
|
struct evtchn_bind_vcpu bind_vcpu;
|
|
struct xenisrc *isrc;
|
|
u_int to_cpu, vcpu_id;
|
|
int error;
|
|
|
|
#ifdef XENHVM
|
|
if (xen_vector_callback_enabled == 0)
|
|
return (EOPNOTSUPP);
|
|
#endif
|
|
|
|
to_cpu = apic_cpuid(apic_id);
|
|
vcpu_id = pcpu_find(to_cpu)->pc_vcpu_id;
|
|
xen_intr_intrcnt_add(to_cpu);
|
|
|
|
mtx_lock(&xen_intr_isrc_lock);
|
|
isrc = (struct xenisrc *)base_isrc;
|
|
if (!is_valid_evtchn(isrc->xi_port)) {
|
|
mtx_unlock(&xen_intr_isrc_lock);
|
|
return (EINVAL);
|
|
}
|
|
|
|
if ((isrc->xi_type == EVTCHN_TYPE_VIRQ) ||
|
|
(isrc->xi_type == EVTCHN_TYPE_IPI)) {
|
|
/*
|
|
* Virtual IRQs are associated with a cpu by
|
|
* the Hypervisor at evtchn_bind_virq time, so
|
|
* all we need to do is update the per-CPU masks.
|
|
*/
|
|
evtchn_cpu_mask_port(isrc->xi_cpu, isrc->xi_port);
|
|
isrc->xi_cpu = to_cpu;
|
|
evtchn_cpu_unmask_port(isrc->xi_cpu, isrc->xi_port);
|
|
mtx_unlock(&xen_intr_isrc_lock);
|
|
return (0);
|
|
}
|
|
|
|
bind_vcpu.port = isrc->xi_port;
|
|
bind_vcpu.vcpu = vcpu_id;
|
|
|
|
/*
|
|
* Allow interrupts to be fielded on the new VCPU before
|
|
* we ask the hypervisor to deliver them there.
|
|
*/
|
|
evtchn_cpu_unmask_port(to_cpu, isrc->xi_port);
|
|
error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu);
|
|
if (isrc->xi_cpu != to_cpu) {
|
|
if (error == 0) {
|
|
/* Commit to new binding by removing the old one. */
|
|
evtchn_cpu_mask_port(isrc->xi_cpu, isrc->xi_port);
|
|
isrc->xi_cpu = to_cpu;
|
|
} else {
|
|
/* Roll-back to previous binding. */
|
|
evtchn_cpu_mask_port(to_cpu, isrc->xi_port);
|
|
}
|
|
}
|
|
mtx_unlock(&xen_intr_isrc_lock);
|
|
return (0);
|
|
#else
|
|
return (EOPNOTSUPP);
|
|
#endif
|
|
}
|
|
|
|
/*------------------- Virtual Interrupt Source PIC Functions -----------------*/
|
|
/*
|
|
* Mask a level triggered interrupt source.
|
|
*
|
|
* \param isrc The interrupt source to mask (if necessary).
|
|
* \param eoi If non-zero, perform any necessary end-of-interrupt
|
|
* acknowledgements.
|
|
*/
|
|
static void
|
|
xen_intr_disable_source(struct intsrc *isrc, int eoi)
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Unmask a level triggered interrupt source.
|
|
*
|
|
* \param isrc The interrupt source to unmask (if necessary).
|
|
*/
|
|
static void
|
|
xen_intr_enable_source(struct intsrc *isrc)
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Perform any necessary end-of-interrupt acknowledgements.
|
|
*
|
|
* \param isrc The interrupt source to EOI.
|
|
*/
|
|
static void
|
|
xen_intr_eoi_source(struct intsrc *isrc)
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Enable and unmask the interrupt source.
|
|
*
|
|
* \param isrc The interrupt source to enable.
|
|
*/
|
|
static void
|
|
xen_intr_enable_intr(struct intsrc *base_isrc)
|
|
{
|
|
struct xenisrc *isrc = (struct xenisrc *)base_isrc;
|
|
|
|
evtchn_unmask_port(isrc->xi_port);
|
|
}
|
|
|
|
/*------------------ Physical Interrupt Source PIC Functions -----------------*/
|
|
/*
|
|
* Mask a level triggered interrupt source.
|
|
*
|
|
* \param isrc The interrupt source to mask (if necessary).
|
|
* \param eoi If non-zero, perform any necessary end-of-interrupt
|
|
* acknowledgements.
|
|
*/
|
|
static void
|
|
xen_intr_pirq_disable_source(struct intsrc *base_isrc, int eoi)
|
|
{
|
|
struct xenisrc *isrc;
|
|
|
|
isrc = (struct xenisrc *)base_isrc;
|
|
evtchn_mask_port(isrc->xi_port);
|
|
}
|
|
|
|
/*
|
|
* Unmask a level triggered interrupt source.
|
|
*
|
|
* \param isrc The interrupt source to unmask (if necessary).
|
|
*/
|
|
static void
|
|
xen_intr_pirq_enable_source(struct intsrc *base_isrc)
|
|
{
|
|
struct xenisrc *isrc;
|
|
|
|
isrc = (struct xenisrc *)base_isrc;
|
|
evtchn_unmask_port(isrc->xi_port);
|
|
}
|
|
|
|
/*
|
|
* Perform any necessary end-of-interrupt acknowledgements.
|
|
*
|
|
* \param isrc The interrupt source to EOI.
|
|
*/
|
|
static void
|
|
xen_intr_pirq_eoi_source(struct intsrc *base_isrc)
|
|
{
|
|
struct xenisrc *isrc;
|
|
|
|
/* XXX Use shared page of flags for this. */
|
|
isrc = (struct xenisrc *)base_isrc;
|
|
if (isrc->xi_needs_eoi != 0) {
|
|
struct physdev_eoi eoi = { .irq = isrc->xi_pirq };
|
|
|
|
(void)HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Enable and unmask the interrupt source.
|
|
*
|
|
* \param isrc The interrupt source to enable.
|
|
*/
|
|
static void
|
|
xen_intr_pirq_enable_intr(struct intsrc *isrc)
|
|
{
|
|
}
|
|
|
|
/*--------------------------- Public Functions -------------------------------*/
|
|
/*------- API comments for these methods can be found in xen/xenintr.h -------*/
|
|
int
|
|
xen_intr_bind_local_port(device_t dev, evtchn_port_t local_port,
|
|
driver_filter_t filter, driver_intr_t handler, void *arg,
|
|
enum intr_type flags, xen_intr_handle_t *port_handlep)
|
|
{
|
|
struct xenisrc *isrc;
|
|
int error;
|
|
|
|
error = xen_intr_bind_isrc(&isrc, local_port, EVTCHN_TYPE_PORT, dev,
|
|
filter, handler, arg, flags, port_handlep);
|
|
if (error != 0)
|
|
return (error);
|
|
|
|
/*
|
|
* The Event Channel API didn't open this port, so it is not
|
|
* responsible for closing it automatically on unbind.
|
|
*/
|
|
isrc->xi_close = 0;
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
xen_intr_alloc_and_bind_local_port(device_t dev, u_int remote_domain,
|
|
driver_filter_t filter, driver_intr_t handler, void *arg,
|
|
enum intr_type flags, xen_intr_handle_t *port_handlep)
|
|
{
|
|
struct xenisrc *isrc;
|
|
struct evtchn_alloc_unbound alloc_unbound;
|
|
int error;
|
|
|
|
alloc_unbound.dom = DOMID_SELF;
|
|
alloc_unbound.remote_dom = remote_domain;
|
|
error = HYPERVISOR_event_channel_op(EVTCHNOP_alloc_unbound,
|
|
&alloc_unbound);
|
|
if (error != 0) {
|
|
/*
|
|
* XXX Trap Hypercall error code Linuxisms in
|
|
* the HYPERCALL layer.
|
|
*/
|
|
return (-error);
|
|
}
|
|
|
|
error = xen_intr_bind_isrc(&isrc, alloc_unbound.port, EVTCHN_TYPE_PORT,
|
|
dev, filter, handler, arg, flags,
|
|
port_handlep);
|
|
if (error != 0) {
|
|
evtchn_close_t close = { .port = alloc_unbound.port };
|
|
if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close))
|
|
panic("EVTCHNOP_close failed");
|
|
return (error);
|
|
}
|
|
|
|
isrc->xi_close = 1;
|
|
return (0);
|
|
}
|
|
|
|
int
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xen_intr_bind_remote_port(device_t dev, u_int remote_domain,
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u_int remote_port, driver_filter_t filter, driver_intr_t handler,
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void *arg, enum intr_type flags, xen_intr_handle_t *port_handlep)
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{
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struct xenisrc *isrc;
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struct evtchn_bind_interdomain bind_interdomain;
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int error;
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bind_interdomain.remote_dom = remote_domain;
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bind_interdomain.remote_port = remote_port;
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error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
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&bind_interdomain);
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if (error != 0) {
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/*
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* XXX Trap Hypercall error code Linuxisms in
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* the HYPERCALL layer.
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*/
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return (-error);
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}
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error = xen_intr_bind_isrc(&isrc, bind_interdomain.local_port,
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EVTCHN_TYPE_PORT, dev, filter, handler,
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arg, flags, port_handlep);
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if (error) {
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evtchn_close_t close = { .port = bind_interdomain.local_port };
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if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close))
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panic("EVTCHNOP_close failed");
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return (error);
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}
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/*
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* The Event Channel API opened this port, so it is
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* responsible for closing it automatically on unbind.
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*/
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isrc->xi_close = 1;
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return (0);
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}
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int
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xen_intr_bind_virq(device_t dev, u_int virq, u_int cpu,
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driver_filter_t filter, driver_intr_t handler, void *arg,
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enum intr_type flags, xen_intr_handle_t *port_handlep)
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{
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int vcpu_id = pcpu_find(cpu)->pc_vcpu_id;
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struct xenisrc *isrc;
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struct evtchn_bind_virq bind_virq = { .virq = virq, .vcpu = vcpu_id };
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int error;
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/* Ensure the target CPU is ready to handle evtchn interrupts. */
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xen_intr_intrcnt_add(cpu);
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isrc = NULL;
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error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq, &bind_virq);
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if (error != 0) {
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/*
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* XXX Trap Hypercall error code Linuxisms in
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* the HYPERCALL layer.
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*/
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return (-error);
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}
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error = xen_intr_bind_isrc(&isrc, bind_virq.port, EVTCHN_TYPE_VIRQ, dev,
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filter, handler, arg, flags, port_handlep);
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#ifdef SMP
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if (error == 0)
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error = intr_event_bind(isrc->xi_intsrc.is_event, cpu);
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#endif
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if (error != 0) {
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evtchn_close_t close = { .port = bind_virq.port };
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xen_intr_unbind(*port_handlep);
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if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close))
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panic("EVTCHNOP_close failed");
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return (error);
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}
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#ifdef SMP
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if (isrc->xi_cpu != cpu) {
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/*
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* Too early in the boot process for the generic interrupt
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* code to perform the binding. Update our event channel
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* masks manually so events can't fire on the wrong cpu
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* during AP startup.
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*/
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xen_intr_assign_cpu(&isrc->xi_intsrc, cpu_apic_ids[cpu]);
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}
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#endif
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/*
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* The Event Channel API opened this port, so it is
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* responsible for closing it automatically on unbind.
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*/
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isrc->xi_close = 1;
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isrc->xi_virq = virq;
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return (0);
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}
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int
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xen_intr_alloc_and_bind_ipi(device_t dev, u_int cpu,
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driver_filter_t filter, enum intr_type flags,
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xen_intr_handle_t *port_handlep)
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{
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#ifdef SMP
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int vcpu_id = pcpu_find(cpu)->pc_vcpu_id;
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struct xenisrc *isrc;
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struct evtchn_bind_ipi bind_ipi = { .vcpu = vcpu_id };
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int error;
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/* Ensure the target CPU is ready to handle evtchn interrupts. */
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xen_intr_intrcnt_add(cpu);
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isrc = NULL;
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error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi, &bind_ipi);
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if (error != 0) {
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/*
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* XXX Trap Hypercall error code Linuxisms in
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* the HYPERCALL layer.
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*/
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return (-error);
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}
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error = xen_intr_bind_isrc(&isrc, bind_ipi.port, EVTCHN_TYPE_IPI,
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dev, filter, NULL, NULL, flags,
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port_handlep);
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if (error == 0)
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error = intr_event_bind(isrc->xi_intsrc.is_event, cpu);
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if (error != 0) {
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evtchn_close_t close = { .port = bind_ipi.port };
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xen_intr_unbind(*port_handlep);
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if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close))
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panic("EVTCHNOP_close failed");
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return (error);
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}
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if (isrc->xi_cpu != cpu) {
|
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/*
|
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* Too early in the boot process for the generic interrupt
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|
* code to perform the binding. Update our event channel
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* masks manually so events can't fire on the wrong cpu
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* during AP startup.
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*/
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xen_intr_assign_cpu(&isrc->xi_intsrc, cpu_apic_ids[cpu]);
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}
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|
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/*
|
|
* The Event Channel API opened this port, so it is
|
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* responsible for closing it automatically on unbind.
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*/
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isrc->xi_close = 1;
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return (0);
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#else
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return (EOPNOTSUPP);
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#endif
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}
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|
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int
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xen_intr_describe(xen_intr_handle_t port_handle, const char *fmt, ...)
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{
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char descr[MAXCOMLEN + 1];
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struct xenisrc *isrc;
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va_list ap;
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isrc = xen_intr_isrc(port_handle);
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if (isrc == NULL)
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return (EINVAL);
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va_start(ap, fmt);
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vsnprintf(descr, sizeof(descr), fmt, ap);
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va_end(ap);
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return (intr_describe(isrc->xi_vector, port_handle, descr));
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}
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void
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xen_intr_unbind(xen_intr_handle_t *port_handlep)
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{
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struct intr_handler *handler;
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struct xenisrc *isrc;
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handler = *port_handlep;
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*port_handlep = NULL;
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isrc = xen_intr_isrc(handler);
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if (isrc == NULL)
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return;
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intr_remove_handler(handler);
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xen_intr_release_isrc(isrc);
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}
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|
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void
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xen_intr_signal(xen_intr_handle_t handle)
|
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{
|
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struct xenisrc *isrc;
|
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|
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isrc = xen_intr_isrc(handle);
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if (isrc != NULL) {
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KASSERT(isrc->xi_type == EVTCHN_TYPE_PORT ||
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isrc->xi_type == EVTCHN_TYPE_IPI,
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("evtchn_signal on something other than a local port"));
|
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struct evtchn_send send = { .port = isrc->xi_port };
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(void)HYPERVISOR_event_channel_op(EVTCHNOP_send, &send);
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}
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}
|
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|
|
evtchn_port_t
|
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xen_intr_port(xen_intr_handle_t handle)
|
|
{
|
|
struct xenisrc *isrc;
|
|
|
|
isrc = xen_intr_isrc(handle);
|
|
if (isrc == NULL)
|
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return (0);
|
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|
|
return (isrc->xi_port);
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}
|