d4fcf3cba5
and amd64. The optimization is a trivial on recent machines. Reviewed by: -arch (imp, marcel, dfr)
320 lines
8.7 KiB
C
320 lines
8.7 KiB
C
/*-
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* Copyright (c) 2003-2004 HighPoint Technologies, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _OSBSD_H_
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#define _OSBSD_H_
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#include <sys/bus.h>
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#include <sys/resource.h>
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#include <sys/eventhandler.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <cam/cam.h>
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#include <cam/cam_ccb.h>
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#include <cam/cam_debug.h>
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#include <cam/cam_sim.h>
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#include <cam/cam_xpt_sim.h>
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#include <cam/cam_periph.h>
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#include <cam/scsi/scsi_all.h>
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#include <cam/scsi/scsi_message.h>
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extern intrmask_t lock_driver(void);
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extern void unlock_driver(intrmask_t spl);
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typedef struct
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{
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UCHAR status; /* 0 nonbootable; 80h bootable */
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UCHAR start_head;
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USHORT start_sector;
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UCHAR type;
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UCHAR end_head;
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USHORT end_sector;
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ULONG start_abs_sector;
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ULONG num_of_sector;
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} partition;
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typedef struct _INQUIRYDATA {
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UCHAR DeviceType : 5;
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UCHAR DeviceTypeQualifier : 3;
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UCHAR DeviceTypeModifier : 7;
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UCHAR RemovableMedia : 1;
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UCHAR Versions;
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UCHAR ResponseDataFormat;
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UCHAR AdditionalLength;
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UCHAR Reserved[2];
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UCHAR SoftReset : 1;
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UCHAR CommandQueue : 1;
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UCHAR Reserved2 : 1;
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UCHAR LinkedCommands : 1;
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UCHAR Synchronous : 1;
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UCHAR Wide16Bit : 1;
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UCHAR Wide32Bit : 1;
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UCHAR RelativeAddressing : 1;
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UCHAR VendorId[8];
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UCHAR ProductId[16];
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UCHAR ProductRevisionLevel[4];
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UCHAR VendorSpecific[20];
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UCHAR Reserved3[40];
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} INQUIRYDATA, *PINQUIRYDATA;
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typedef struct _READ_CAPACITY_DATA {
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ULONG LogicalBlockAddress;
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ULONG BytesPerBlock;
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} READ_CAPACITY_DATA, *PREAD_CAPACITY_DATA;
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#define MV_IAL_HT_SACOALT_DEFAULT 1
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#define MV_IAL_HT_SAITMTH_DEFAULT 1
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/****************************************/
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/* GENERAL Definitions */
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/****************************************/
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/* Bits for HD_ERROR */
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#define NM_ERR 0x02 /* media present */
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#define ABRT_ERR 0x04 /* Command aborted */
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#define MCR_ERR 0x08 /* media change request */
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#define IDNF_ERR 0x10 /* ID field not found */
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#define MC_ERR 0x20 /* media changed */
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#define UNC_ERR 0x40 /* Uncorrect data */
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#define WP_ERR 0x40 /* write protect */
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#define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */
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#define REQUESTS_ARRAY_SIZE (9 * MV_EDMA_REQUEST_QUEUE_SIZE) /* 9 K bytes */
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#define RESPONSES_ARRAY_SIZE (12*MV_EDMA_RESPONSE_QUEUE_SIZE) /* 3 K bytes */
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#define PRD_ENTRIES_PER_CMD (MAX_SG_DESCRIPTORS+1)
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#define PRD_ENTRIES_SIZE (MV_EDMA_PRD_ENTRY_SIZE*PRD_ENTRIES_PER_CMD)
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#define PRD_TABLES_FOR_VBUS (MV_SATA_CHANNELS_NUM*MV_EDMA_QUEUE_LENGTH)
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typedef enum _SataEvent {
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SATA_EVENT_NO_CHANGE = 0,
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SATA_EVENT_CHANNEL_CONNECTED,
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SATA_EVENT_CHANNEL_DISCONNECTED
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} SATA_EVENT;
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typedef ULONG_PTR dma_addr_t;
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typedef struct _MV_CHANNEL {
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unsigned int maxUltraDmaModeSupported;
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unsigned int maxDmaModeSupported;
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unsigned int maxPioModeSupported;
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MV_BOOLEAN online;
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} MV_CHANNEL;
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struct _privCommand;
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typedef struct IALAdapter {
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struct cam_path *path;
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device_t hpt_dev; /* bus device */
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struct resource *hpt_irq; /* interrupt */
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void *hpt_intr; /* interrupt handle */
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struct resource *mem_res;
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bus_space_handle_t mem_bsh;
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bus_space_tag_t mem_btag;
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bus_dma_tag_t parent_dmat;
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bus_dma_tag_t req_dmat;
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bus_dmamap_t req_map;
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bus_dma_tag_t resp_dmat;
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bus_dmamap_t resp_map;
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bus_dma_tag_t prd_dmat;
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bus_dmamap_t prd_map;
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bus_dma_tag_t buf_dmat;
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struct IALAdapter *next;
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MV_SATA_ADAPTER mvSataAdapter;
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MV_CHANNEL mvChannel[MV_SATA_CHANNELS_NUM];
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MV_U8 *requestsArrayBaseAddr;
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MV_U8 *requestsArrayBaseAlignedAddr;
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dma_addr_t requestsArrayBaseDmaAddr;
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dma_addr_t requestsArrayBaseDmaAlignedAddr;
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MV_U8 *responsesArrayBaseAddr;
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MV_U8 *responsesArrayBaseAlignedAddr;
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dma_addr_t responsesArrayBaseDmaAddr;
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dma_addr_t responsesArrayBaseDmaAlignedAddr;
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SATA_EVENT sataEvents[MV_SATA_CHANNELS_NUM];
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struct callout_handle event_timer_connect;
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struct callout_handle event_timer_disconnect;
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struct _VBus VBus;
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struct _VDevice VDevices[MV_SATA_CHANNELS_NUM];
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PCommand pCommandBlocks;
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struct _privCommand *pPrivateBlocks;
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TAILQ_HEAD(, _privCommand) PrivCmdTQH;
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PUCHAR prdTableAddr;
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ULONG prdTableDmaAddr;
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void* pFreePRDLink;
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union ccb *pending_Q;
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MV_U8 outstandingCommands;
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UCHAR status;
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UCHAR ver_601;
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UCHAR beeping;
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eventhandler_tag eh;
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} IAL_ADAPTER_T;
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typedef struct _privCommand {
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TAILQ_ENTRY(_privCommand) PrivEntry;
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IAL_ADAPTER_T *pAdapter;
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union ccb *ccb;
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bus_dmamap_t buf_map;
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} *pPrivCommand;
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extern IAL_ADAPTER_T *gIal_Adapter;
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/*entry.c*/
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typedef void (*HPT_DPC)(IAL_ADAPTER_T *,void*,UCHAR);
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int hpt_queue_dpc(HPT_DPC dpc, IAL_ADAPTER_T *pAdapter, void *arg, UCHAR flags);
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void hpt_rebuild_data_block(IAL_ADAPTER_T *pAdapter, PVDevice pArray,
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UCHAR flags);
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void Check_Idle_Call(IAL_ADAPTER_T *pAdapter);
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int Kernel_DeviceIoControl(_VBUS_ARG DWORD dwIoControlCode, PVOID lpInBuffer,
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DWORD nInBufferSize, PVOID lpOutBuffer, DWORD nOutBufferSize,
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PDWORD lpBytesReturned);
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void fRescanAllDevice(_VBUS_ARG0);
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int hpt_add_disk_to_array(_VBUS_ARG DEVICEID idArray, DEVICEID idDisk);
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#define __str_direct(x) #x
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#define __str(x) __str_direct(x)
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#define KMSG_LEADING __str(PROC_DIR_NAME) ": "
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#define hpt_printk(_x_) do { \
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printf(KMSG_LEADING); \
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printf _x_ ; \
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} while (0)
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#define DUPLICATE 0
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#define INITIALIZE 1
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#define REBUILD_PARITY 2
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#define VERIFY 3
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/**********************************************************/
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static __inline struct cam_periph *
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hpt_get_periph(int path_id,int target_id)
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{
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struct cam_periph *periph = NULL;
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struct cam_path *path;
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int status;
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status = xpt_create_path(&path, NULL, path_id, target_id, 0);
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if (status == CAM_REQ_CMP) {
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periph = cam_periph_find(path, NULL);
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xpt_free_path(path);
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if (periph != NULL) {
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if (strncmp(periph->periph_name, "da", 2))
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periph = NULL;
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}
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}
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return periph;
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}
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static __inline void
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FreePrivCommand(IAL_ADAPTER_T *pAdapter, pPrivCommand prvCmd)
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{
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TAILQ_INSERT_TAIL(&pAdapter->PrivCmdTQH, prvCmd, PrivEntry);
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}
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static __inline pPrivCommand
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AllocPrivCommand(IAL_ADAPTER_T *pAdapter)
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{
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pPrivCommand prvCmd;
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prvCmd = TAILQ_FIRST(&pAdapter->PrivCmdTQH);
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if (prvCmd == NULL)
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return NULL;
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TAILQ_REMOVE(&pAdapter->PrivCmdTQH, prvCmd, PrivEntry);
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return (prvCmd);
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}
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static __inline void
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mv_reg_write_byte(MV_BUS_ADDR_T base, MV_U32 offset, MV_U8 val)
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{
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IAL_ADAPTER_T *pAdapter;
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pAdapter = base;
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bus_space_write_1(pAdapter->mem_btag, pAdapter->mem_bsh, offset, val);
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}
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static __inline void
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mv_reg_write_word(MV_BUS_ADDR_T base, MV_U32 offset, MV_U16 val)
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{
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IAL_ADAPTER_T *pAdapter;
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pAdapter = base;
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bus_space_write_2(pAdapter->mem_btag, pAdapter->mem_bsh, offset, val);
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}
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static __inline void
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mv_reg_write_dword(MV_BUS_ADDR_T base, MV_U32 offset, MV_U32 val)
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{
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IAL_ADAPTER_T *pAdapter;
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pAdapter = base;
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bus_space_write_4(pAdapter->mem_btag, pAdapter->mem_bsh, offset, val);
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}
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static __inline MV_U8
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mv_reg_read_byte(MV_BUS_ADDR_T base, MV_U32 offset)
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{
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IAL_ADAPTER_T *pAdapter;
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pAdapter = base;
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return (bus_space_read_1(pAdapter->mem_btag, pAdapter->mem_bsh,
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offset));
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}
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static __inline MV_U16
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mv_reg_read_word(MV_BUS_ADDR_T base, MV_U32 offset)
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{
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IAL_ADAPTER_T *pAdapter;
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pAdapter = base;
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return (bus_space_read_2(pAdapter->mem_btag, pAdapter->mem_bsh,
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offset));
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}
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static __inline MV_U32
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mv_reg_read_dword(MV_BUS_ADDR_T base, MV_U32 offset)
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{
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IAL_ADAPTER_T *pAdapter;
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pAdapter = base;
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return (bus_space_read_4(pAdapter->mem_btag, pAdapter->mem_bsh,
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offset));
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}
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#endif
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