5c99cda025
This code base on lpc code. Ralink RT1310 is oem from 5V Technologies. RT1310 is ARM926EJS(arm5t). Tested: * Buffalo WZR2-G300N Submitted by: Hiroki Mori <yamori813@yahoo.co.jp> Reviewed by: mizhka Differential Revision: https://reviews.freebsd.org/D7238
177 lines
4.2 KiB
C
177 lines
4.2 KiB
C
/*-
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* Copyright (c) 1994-1998 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: FreeBSD: sys/arm/lpc/lpc_machdep.c
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*/
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#include "opt_ddb.h"
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#define _ARM32_BUS_DMA_PRIVATE
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/reboot.h>
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#include <sys/devmap.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/bus.h>
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#include <machine/fdt.h>
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#include <machine/machdep.h>
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#include <machine/platform.h>
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#include <machine/cpu.h>
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#include <arm/ralink/rt1310reg.h>
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#include <arm/ralink/rt1310var.h>
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#include <dev/fdt/fdt_common.h>
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#ifdef EARLY_PRINTF
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early_putc_t *early_putc;
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#endif
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uint32_t rt1310_master_clock;
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vm_offset_t
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platform_lastaddr(void)
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{
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return (devmap_lastaddr());
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}
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void
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platform_probe_and_attach(void)
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{
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}
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void
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platform_gpio_init(void)
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{
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/*
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* Set initial values of GPIO output ports
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*/
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}
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void
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platform_late_init(void)
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{
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bootverbose = 1;
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}
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/*
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* Add a single static device mapping.
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* The values used were taken from the ranges property of the SoC node in the
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* dts file when this code was converted to arm_devmap_add_entry().
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*/
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int
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platform_devmap_init(void)
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{
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devmap_add_entry(0x19C00000, 0xE0000);
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devmap_add_entry(0x1e800000, 0x800000);
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devmap_add_entry(0x1f000000, 0x400000);
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return (0);
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}
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struct arm32_dma_range *
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bus_dma_get_range(void)
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{
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return (NULL);
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}
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int
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bus_dma_get_range_nb(void)
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{
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return (0);
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}
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void
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cpu_reset(void)
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{
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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bst = fdtbus_bs_tag;
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/* Enable WDT */
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/* Instant assert of RESETOUT_N with pulse length 1ms */
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bus_space_map(bst, 0x1e8c0000, 0x20000, 0, &bsh);
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bus_space_write_4(bst, bsh, 0, 13000);
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bus_space_write_4(bst, bsh, 8, (1<<3) | (1<<4) | 7);
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bus_space_unmap(bst, bsh, 0x20000);
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for (;;)
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continue;
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}
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#ifdef RALINK_BOOT_DEBUG
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void bootdebug1(int c);
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void bootdebug1(int c)
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{
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/* direct put uart physical address */
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uint8_t* uart_base_addr=(uint8_t*)0x1e840000;
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*(uart_base_addr) = c;
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}
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void bootdebug2(int c);
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void bootdebug2(int c)
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{
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#if defined(SOCDEV_PA) && defined(SOCDEV_VA)
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/* direct put uart map address at locore-v4.S */
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uint8_t* uart_base_addr=(uint8_t*)0xce840000;
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*(uart_base_addr) = c;
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#endif
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}
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void bootdebug3(int c);
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void bootdebug3(int c)
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{
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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bst = fdtbus_bs_tag;
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bus_space_map(bst, 0x1e840000, 0x20000, 0, &bsh);
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bus_space_write_1(bst, bsh, 0, c);
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bus_space_unmap(bst, bsh, 0x20000);
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}
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#endif
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