d619133a06
cardbus bridge init routine for all cardbuses. This routine attempts to compensate for BIOSes that do not setup the cardbus bridge into legacy mode. Since this is becoming more common, and cardbus pci cards have appeared on the market, this makes sense. Do some TI113x specific initialization. This came in as part of the patch. Report TI1[1234]XX specific config registers protected by bootverbose. Minor code cleanup while I'm here. I've also removed the unused code present in the original patches, and cleaned it up slightly in places as well. The original patches supported more than one card, but these patches support just one. We should likely revisit this in the future. This makes the Compaq card that Walnut Creek CD purchased for me work in my bouncer box. This is a MFC candidate. However, I'd like to get some airtime on these patches on as many laptops as possible before doing the MFC. It does change things somewhat. In theory, apart from the minor TI tweaks, this shouldn't change anything if the bridge is in legacy mode already. Submitted by: sanpei@sanpei.org (MIHIRA Yoshiro)
408 lines
11 KiB
C
408 lines
11 KiB
C
/*
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* Copyright (c) 1997 Ted Faber
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Absolutely no warranty of function or purpose is made by the author
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* Ted Faber.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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#include <pci/pcic_p.h>
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#include <pccard/i82365.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#define PRVERB(x) if (bootverbose) device_printf x
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/*
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* Set up the CL-PD6832 to look like a ISA based PCMCIA chip (a
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* PD672X). This routine is called once per PCMCIA socket.
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*/
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static void
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pd6832_legacy_init(device_t dev)
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{
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u_long bcr; /* to set interrupts */
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u_short io_port; /* the io_port to map this slot on */
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static int num6832; /* The number of 6832s initialized */
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int unit;
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num6832 = 0;
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unit = device_get_unit(dev);
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/*
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* Some BIOS leave the legacy address uninitialized. This
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* insures that the PD6832 puts itself where the driver will
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* look. We assume that multiple 6832's should be laid out
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* sequentially. We only initialize the first socket's legacy port,
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* the other is a dummy.
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*/
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io_port = PCIC_INDEX_0 + num6832 * CLPD6832_NUM_REGS;
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if (unit == 0)
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pci_write_config(dev, CLPD6832_LEGACY_16BIT_IOADDR,
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io_port & ~PCI_MAP_IO, 4);
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/*
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* I think this should be a call to pci_map_port, but that
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* routine won't map regiaters above 0x28, and the register we
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* need to map is 0x44.
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*/
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io_port = pci_read_config(dev, CLPD6832_LEGACY_16BIT_IOADDR, 4) &
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~PCI_MAP_IO;
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/*
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* Configure the first I/O window to contain CLPD6832_NUM_REGS
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* words and deactivate the second by setting the limit lower
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* than the base.
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*/
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pci_write_config(dev, CLPD6832_IO_BASE0, io_port | 1, 4);
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pci_write_config(dev, CLPD6832_IO_LIMIT0,
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(io_port + CLPD6832_NUM_REGS) | 1, 4);
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pci_write_config(dev, CLPD6832_IO_BASE1, (io_port + 0x20) | 1, 4);
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pci_write_config(dev, CLPD6832_IO_LIMIT1, io_port | 1, 4);
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/*
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* Set default operating mode (I/O port space) and allocate
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* this socket to the current unit.
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*/
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pci_write_config(dev, PCI_COMMAND_STATUS_REG,
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CLPD6832_COMMAND_DEFAULTS, 4);
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pci_write_config(dev, CLPD6832_SOCKET, unit, 4);
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/*
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* Set up the card inserted/card removed interrupts to come
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* through the isa IRQ.
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*/
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bcr = pci_read_config(dev, CLPD6832_BRIDGE_CONTROL, 4);
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bcr |= (CLPD6832_BCR_ISA_IRQ|CLPD6832_BCR_MGMT_IRQ_ENA);
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pci_write_config(dev, CLPD6832_BRIDGE_CONTROL, bcr, 4);
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/* After initializing 2 sockets, the chip is fully configured */
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if (unit == 1)
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num6832++;
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PRVERB((dev, "CardBus: Legacy PC-card 16bit I/O address [0x%x]\n",
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io_port));
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}
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/*
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* TI1XXX PCI-CardBus Host Adapter specific function code.
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* This function is separated from pcic_pci_attach().
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* Support Device: TI1130,TI1131,TI1250,TI1220.
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* Test Device: TI1221.
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* Takeshi Shibagaki(shiba@jp.freebsd.org).
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*/
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static void
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ti1xxx_pci_init(device_t dev)
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{
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u_long syscntl,devcntl,cardcntl;
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u_int32_t device_id = pci_get_devid(dev);
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char buf[128];
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int ti113x = (device_id == PCI_DEVICE_ID_PCIC_TI1130)
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|| (device_id == PCI_DEVICE_ID_PCIC_TI1131);
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syscntl = pci_read_config(dev, TI113X_PCI_SYSTEM_CONTROL, 4);
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devcntl = pci_read_config(dev, TI113X_PCI_DEVICE_CONTROL, 1);
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cardcntl = pci_read_config(dev, TI113X_PCI_CARD_CONTROL, 1);
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switch(ti113x){
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case 0 :
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strcpy(buf, "TI12XX PCI Config Reg: ");
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break;
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case 1 :
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strcpy(buf, "TI113X PCI Config Reg: ");
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/*
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* Defalut card control register setting is
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* PCI interrupt. The method of this code
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* switches PCI INT and ISA IRQ by bit 7 of
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* Bridge Control Register(Offset:0x3e,0x13e).
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* Takeshi Shibagaki(shiba@jp.freebsd.org)
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*/
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cardcntl |= TI113X_CARDCNTL_PCI_IREQ;
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cardcntl |= TI113X_CARDCNTL_PCI_CSC;
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if (syscntl & TI113X_SYSCNTL_CLKRUN_ENA){
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if (syscntl & TI113X_SYSCNTL_CLKRUN_SEL)
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strcat(buf, "[clkrun irq 12]");
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else
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strcat(buf, "[clkrun irq 10]");
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}
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break;
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}
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if (cardcntl & TI113X_CARDCNTL_RING_ENA)
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strcat(buf, "[ring enable]");
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if (cardcntl & TI113X_CARDCNTL_SPKR_ENA)
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strcat(buf, "[speaker enable]");
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if (syscntl & TI113X_SYSCNTL_PWRSAVINGS)
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strcat(buf, "[pwr save]");
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switch(devcntl & TI113X_DEVCNTL_INTR_MASK){
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case TI113X_DEVCNTL_INTR_ISA :
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strcat(buf, "[CSC parallel isa irq]");
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break;
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case TI113X_DEVCNTL_INTR_SERIAL :
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strcat(buf, "[CSC serial isa irq]");
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break;
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case TI113X_DEVCNTL_INTR_NONE :
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strcat(buf, "[pci only]");
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break;
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case TI12XX_DEVCNTL_INTR_ALLSERIAL :
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strcat(buf, "[FUNC pci int + CSC serial isa irq]");
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break;
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}
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pci_write_config(dev, TI113X_PCI_CARD_CONTROL, cardcntl, 1);
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if (ti113x)
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cardcntl = pci_read_config(dev, TI113X_PCI_CARD_CONTROL, 1);
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device_printf(dev, "%s\n",buf);
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}
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static void
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generic_cardbus_attach(device_t dev)
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{
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u_int16_t brgcntl;
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u_int32_t iobase;
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int unit;
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unit = device_get_unit(dev);
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/* Output ISA IRQ indicated in ExCA register(0x03). */
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brgcntl = pci_read_config(dev, CB_PCI_BRIDGE_CTRL, 2);
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brgcntl |= CB_BCR_INT_EXCA;
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pci_write_config(dev, CB_PCI_BRIDGE_CTRL, brgcntl, 2);
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/* 16bit Legacy Mode Base Address */
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if (unit != 0)
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return;
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iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2)
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& ~PCI_MAP_IO;
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if (!iobase) {
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iobase = 0x3e0 | PCI_MAP_IO;
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pci_write_config(dev, CB_PCI_LEGACY16_IOADDR, iobase, 2);
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iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2)
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& ~PCI_MAP_IO;
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}
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PRVERB((dev, "Legacy address set to %#x\n", iobase));
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return;
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}
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/*
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* Return the ID string for the controller if the vendor/product id
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* matches, NULL otherwise.
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*/
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static int
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pcic_pci_probe(device_t dev)
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{
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u_int32_t device_id;
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char *desc;
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device_id = pci_get_devid(dev);
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desc = NULL;
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switch (device_id) {
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case PCI_DEVICE_ID_PCIC_CLPD6832:
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desc = "Cirrus Logic PD6832 PCI/CardBus Bridge";
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break;
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case PCI_DEVICE_ID_PCIC_TI1130:
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desc = "TI PCI-1130 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_PCIC_TI1131:
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desc = "TI PCI-1131 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_PCIC_TI1220:
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desc = "TI PCI-1220 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_PCIC_TI1221:
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desc = "TI PCI-1221 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_PCIC_TI1225:
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desc = "TI PCI-1225 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_PCIC_TI1250:
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desc = "TI PCI-1250 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_PCIC_TI1251:
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desc = "TI PCI-1251 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_PCIC_TI1251B:
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desc = "TI PCI-1251B PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_PCIC_TI1410:
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desc = "TI PCI-1410 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_PCIC_TI1420:
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desc = "TI PCI-1420 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_PCIC_TI1450:
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desc = "TI PCI-1450 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_PCIC_TI1451:
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desc = "TI PCI-1451 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_TOSHIBA_TOPIC95:
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desc = "Toshiba ToPIC95 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_TOSHIBA_TOPIC97:
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desc = "Toshiba ToPIC97 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_RICOH_RL5C465:
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desc = "Ricoh RL5C465 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_RICOH_RL5C475:
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desc = "Ricoh RL5C475 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_RICOH_RL5C476:
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desc = "Ricoh RL5C476 PCI-CardBus Bridge";
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break;
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case PCI_DEVICE_ID_RICOH_RL5C478:
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desc = "Ricoh RL5C478 PCI-CardBus Bridge";
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break;
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/* 16bit PC-card bridges */
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case PCI_DEVICE_ID_PCIC_CLPD6729:
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desc = "Cirrus Logic PD6729/6730 PC-Card Controller";
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break;
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case PCI_DEVICE_ID_PCIC_OZ6729:
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desc = "O2micro OZ6729 PC-Card Bridge";
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break;
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case PCI_DEVICE_ID_PCIC_OZ6730:
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desc = "O2micro OZ6730 PC-Card Bridge";
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break;
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default:
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break;
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}
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if (desc == NULL)
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return (ENXIO);
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device_set_desc(dev, desc);
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return 0; /* exact match */
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}
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/*
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* General PCI based card dispatch routine. Right now
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* it only understands the CL-PD6832.
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*/
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static int
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pcic_pci_attach(device_t dev)
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{
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u_int32_t device_id = pci_get_devid(dev);
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u_long command;
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/* Init. CardBus/PC-card controllers as 16-bit PC-card controllers */
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/* Place any per "slot" initialization here */
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/*
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* In sys/pci/pcireg.h, PCI_COMMAND_STATUS_REG must be separated
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* PCI_COMMAND_REG(0x04) and PCI_STATUS_REG(0x06).
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* Takeshi Shibagaki(shiba@jp.freebsd.org).
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*/
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command = pci_read_config(dev, PCI_COMMAND_STATUS_REG, 4);
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command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
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pci_write_config(dev, PCI_COMMAND_STATUS_REG, command, 4);
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switch (device_id) {
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case PCI_DEVICE_ID_PCIC_TI1130:
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case PCI_DEVICE_ID_PCIC_TI1131:
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case PCI_DEVICE_ID_PCIC_TI1220:
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case PCI_DEVICE_ID_PCIC_TI1221:
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case PCI_DEVICE_ID_PCIC_TI1250:
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case PCI_DEVICE_ID_PCIC_TI1251:
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case PCI_DEVICE_ID_PCIC_TI1251B:
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case PCI_DEVICE_ID_PCIC_TI1225:
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case PCI_DEVICE_ID_PCIC_TI1410:
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case PCI_DEVICE_ID_PCIC_TI1420:
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case PCI_DEVICE_ID_PCIC_TI1450:
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case PCI_DEVICE_ID_PCIC_TI1451:
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ti1xxx_pci_init(dev);
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/* FALLTHROUGH */
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default:
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generic_cardbus_attach(dev);
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break;
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case PCI_DEVICE_ID_PCIC_CLPD6832:
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pd6832_legacy_init(dev);
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break;
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}
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if (bootverbose) {
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int i, j;
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u_char *p;
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u_long *pl;
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printf("PCI Config space:\n");
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for (j = 0; j < 0x98; j += 16) {
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printf("%02x: ", j);
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for (i = 0; i < 16; i += 4)
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printf(" %08x", pci_read_config(dev, i+j, 4));
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printf("\n");
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}
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p = (u_char *)pmap_mapdev(pci_read_config(dev, 0x10, 4),
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0x1000);
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pl = (u_long *)p;
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printf("Cardbus Socket registers:\n");
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printf("00: ");
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for (i = 0; i < 4; i += 1)
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printf(" %08lx:", pl[i]);
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printf("\n10: ");
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for (i = 4; i < 8; i += 1)
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printf(" %08lx:", pl[i]);
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printf("\nExCa registers:\n");
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for (i = 0; i < 0x40; i += 16)
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printf("%02x: %16D\n", i, p + 0x800 + i, " ");
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}
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return 0;
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}
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static device_method_t pcic_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, pcic_pci_probe),
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DEVMETHOD(device_attach, pcic_pci_attach),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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{0, 0}
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};
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static driver_t pcic_pci_driver = {
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"pcic-pci",
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pcic_pci_methods,
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0 /* no softc */
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};
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static devclass_t pcic_pci_devclass;
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DRIVER_MODULE(pcic_pci, pci, pcic_pci_driver, pcic_pci_devclass, 0, 0);
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