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freebsd-dev/sys/pc98/include/bus.h
Kenneth D. Merry a9934668aa Add asynchronous command support to the pass(4) driver, and the new 
camdd(8) utility.

CCBs may be queued to the driver via the new CAMIOQUEUE ioctl, and
completed CCBs may be retrieved via the CAMIOGET ioctl.  User
processes can use poll(2) or kevent(2) to get notification when
I/O has completed.

While the existing CAMIOCOMMAND blocking ioctl interface only
supports user virtual data pointers in a CCB (generally only
one per CCB), the new CAMIOQUEUE ioctl supports user virtual and
physical address pointers, as well as user virtual and physical
scatter/gather lists.  This allows user applications to have more
flexibility in their data handling operations.

Kernel memory for data transferred via the queued interface is
allocated from the zone allocator in MAXPHYS sized chunks, and user
data is copied in and out.  This is likely faster than the
vmapbuf()/vunmapbuf() method used by the CAMIOCOMMAND ioctl in
configurations with many processors (there are more TLB shootdowns
caused by the mapping/unmapping operation) but may not be as fast
as running with unmapped I/O.

The new memory handling model for user requests also allows
applications to send CCBs with request sizes that are larger than
MAXPHYS.  The pass(4) driver now limits queued requests to the I/O
size listed by the SIM driver in the maxio field in the Path
Inquiry (XPT_PATH_INQ) CCB.

There are some things things would be good to add:

1. Come up with a way to do unmapped I/O on multiple buffers.
   Currently the unmapped I/O interface operates on a struct bio,
   which includes only one address and length.  It would be nice
   to be able to send an unmapped scatter/gather list down to
   busdma.  This would allow eliminating the copy we currently do
   for data.

2. Add an ioctl to list currently outstanding CCBs in the various
   queues.

3. Add an ioctl to cancel a request, or use the XPT_ABORT CCB to do
   that.

4. Test physical address support.  Virtual pointers and scatter
   gather lists have been tested, but I have not yet tested
   physical addresses or scatter/gather lists.

5. Investigate multiple queue support.  At the moment there is one
   queue of commands per pass(4) device.  If multiple processes
   open the device, they will submit I/O into the same queue and
   get events for the same completions.  This is probably the right
   model for most applications, but it is something that could be
   changed later on.

Also, add a new utility, camdd(8) that uses the asynchronous pass(4)
driver interface.

This utility is intended to be a basic data transfer/copy utility,
a simple benchmark utility, and an example of how to use the
asynchronous pass(4) interface.

It can copy data to and from pass(4) devices using any target queue
depth, starting offset and blocksize for the input and ouptut devices.
It currently only supports SCSI devices, but could be easily extended
to support ATA devices.

It can also copy data to and from regular files, block devices, tape
devices, pipes, stdin, and stdout.  It does not support queueing
multiple commands to any of those targets, since it uses the standard
read(2)/write(2)/writev(2)/readv(2) system calls.

The I/O is done by two threads, one for the reader and one for the
writer.  The reader thread sends completed read requests to the
writer thread in strictly sequential order, even if they complete
out of order.  That could be modified later on for random I/O patterns
or slightly out of order I/O.

camdd(8) uses kqueue(2)/kevent(2) to get I/O completion events from
the pass(4) driver and also to send request notifications internally.

For pass(4) devcies, camdd(8) uses a single buffer (CAM_DATA_VADDR)
per CAM CCB on the reading side, and a scatter/gather list
(CAM_DATA_SG) on the writing side.  In addition to testing both
interfaces, this makes any potential reblocking of I/O easier.  No
data is copied between the reader and the writer, but rather the
reader's buffers are split into multiple I/O requests or combined
into a single I/O request depending on the input and output blocksize.

For the file I/O path, camdd(8) also uses a single buffer (read(2),
write(2), pread(2) or pwrite(2)) on reads, and a scatter/gather list
(readv(2), writev(2), preadv(2), pwritev(2)) on writes.

Things that would be nice to do for camdd(8) eventually:

1.  Add support for I/O pattern generation.  Patterns like all
    zeros, all ones, LBA-based patterns, random patterns, etc. Right
    Now you can always use /dev/zero, /dev/random, etc.

2.  Add support for a "sink" mode, so we do only reads with no
    writes.  Right now, you can use /dev/null.

3.  Add support for automatic queue depth probing, so that we can
    figure out the right queue depth on the input and output side
    for maximum throughput.  At the moment it defaults to 6.

4.  Add support for SATA device passthrough I/O.

5.  Add support for random LBAs and/or lengths on the input and
    output sides.

6.  Track average per-I/O latency and busy time.  The busy time
    and latency could also feed in to the automatic queue depth
    determination.

sys/cam/scsi/scsi_pass.h:
	Define two new ioctls, CAMIOQUEUE and CAMIOGET, that queue
	and fetch asynchronous CAM CCBs respectively.

	Although these ioctls do not have a declared argument, they
	both take a union ccb pointer.  If we declare a size here,
	the ioctl code in sys/kern/sys_generic.c will malloc and free
	a buffer for either the CCB or the CCB pointer (depending on
	how it is declared).  Since we have to keep a copy of the
	CCB (which is fairly large) anyway, having the ioctl malloc
	and free a CCB for each call is wasteful.

sys/cam/scsi/scsi_pass.c:
	Add asynchronous CCB support.

	Add two new ioctls, CAMIOQUEUE and CAMIOGET.

	CAMIOQUEUE adds a CCB to the incoming queue.  The CCB is
	executed immediately (and moved to the active queue) if it
	is an immediate CCB, but otherwise it will be executed
	in passstart() when a CCB is available from the transport layer.

	When CCBs are completed (because they are immediate or
	passdone() if they are queued), they are put on the done
	queue.

	If we get the final close on the device before all pending
	I/O is complete, all active I/O is moved to the abandoned
	queue and we increment the peripheral reference count so
	that the peripheral driver instance doesn't go away before
	all pending I/O is done.

	The new passcreatezone() function is called on the first
	call to the CAMIOQUEUE ioctl on a given device to allocate
	the UMA zones for I/O requests and S/G list buffers.  This
	may be good to move off to a taskqueue at some point.
	The new passmemsetup() function allocates memory and
	scatter/gather lists to hold the user's data, and copies
	in any data that needs to be written.  For virtual pointers
	(CAM_DATA_VADDR), the kernel buffer is malloced from the
	new pass(4) driver malloc bucket.  For virtual
	scatter/gather lists (CAM_DATA_SG), buffers are allocated
	from a new per-pass(9) UMA zone in MAXPHYS-sized chunks.
	Physical pointers are passed in unchanged.  We have support
	for up to 16 scatter/gather segments (for the user and
	kernel S/G lists) in the default struct pass_io_req, so
	requests with longer S/G lists require an extra kernel malloc.

	The new passcopysglist() function copies a user scatter/gather
	list to a kernel scatter/gather list.  The number of elements
	in each list may be different, but (obviously) the amount of data
	stored has to be identical.

	The new passmemdone() function copies data out for the
	CAM_DATA_VADDR and CAM_DATA_SG cases.

	The new passiocleanup() function restores data pointers in
	user CCBs and frees memory.

	Add new functions to support kqueue(2)/kevent(2):

	passreadfilt() tells kevent whether or not the done
	queue is empty.

	passkqfilter() adds a knote to our list.

	passreadfiltdetach() removes a knote from our list.

	Add a new function, passpoll(), for poll(2)/select(2)
	to use.

	Add devstat(9) support for the queued CCB path.

sys/cam/ata/ata_da.c:
	Add support for the BIO_VLIST bio type.

sys/cam/cam_ccb.h:
	Add a new enumeration for the xflags field in the CCB header.
	(This doesn't change the CCB header, just adds an enumeration to
	use.)

sys/cam/cam_xpt.c:
	Add a new function, xpt_setup_ccb_flags(), that allows specifying
	CCB flags.

sys/cam/cam_xpt.h:
	Add a prototype for xpt_setup_ccb_flags().

sys/cam/scsi/scsi_da.c:
	Add support for BIO_VLIST.

sys/dev/md/md.c:
	Add BIO_VLIST support to md(4).

sys/geom/geom_disk.c:
	Add BIO_VLIST support to the GEOM disk class.  Re-factor the I/O size
	limiting code in g_disk_start() a bit.

sys/kern/subr_bus_dma.c:
	Change _bus_dmamap_load_vlist() to take a starting offset and
	length.

	Add a new function, _bus_dmamap_load_pages(), that will load a list
	of physical pages starting at an offset.

	Update _bus_dmamap_load_bio() to allow loading BIO_VLIST bios.
	Allow unmapped I/O to start at an offset.

sys/kern/subr_uio.c:
	Add two new functions, physcopyin_vlist() and physcopyout_vlist().

sys/pc98/include/bus.h:
	Guard kernel-only parts of the pc98 machine/bus.h header with
	#ifdef _KERNEL.

	This allows userland programs to include <machine/bus.h> to get the
	definition of bus_addr_t and bus_size_t.

sys/sys/bio.h:
	Add a new bio flag, BIO_VLIST.

sys/sys/uio.h:
	Add prototypes for physcopyin_vlist() and physcopyout_vlist().

share/man/man4/pass.4:
	Document the CAMIOQUEUE and CAMIOGET ioctls.

usr.sbin/Makefile:
	Add camdd.

usr.sbin/camdd/Makefile:
	Add a makefile for camdd(8).

usr.sbin/camdd/camdd.8:
	Man page for camdd(8).

usr.sbin/camdd/camdd.c:
	The new camdd(8) utility.

Sponsored by:	Spectra Logic
MFC after:	1 week
2015-12-03 20:54:55 +00:00

649 lines
20 KiB
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/*-
* Copyright (c) KATO Takenori, 1999.
*
* All rights reserved. Unpublished rights reserved under the copyright
* laws of Japan.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer as
* the first lines of this file unmodified.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
/* $NecBSD: busio.h,v 3.25.4.2.2.1 2000/06/12 03:53:08 honda Exp $ */
/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */
/*-
* [NetBSD for NEC PC-98 series]
* Copyright (c) 1997, 1998
* NetBSD/pc98 porting staff. All rights reserved.
*
* [Ported for FreeBSD]
* Copyright (c) 2001
* TAKAHASHI Yoshihiro. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1997, 1998
* Naofumi HONDA. All rights reserved.
*
* This module support generic bus address relocation mechanism.
* To reduce a function call overhead, we employ pascal call methods.
*/
#ifndef _PC98_BUS_H_
#define _PC98_BUS_H_
#ifdef _KERNEL
#include <sys/systm.h>
#endif /* _KERNEL */
#include <machine/_bus.h>
#include <machine/cpufunc.h>
#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF
#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
#define BUS_SPACE_MAXSIZE 0xFFFFFFFF
#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF
#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
#define BUS_SPACE_MAXADDR 0xFFFFFFFF
#define BUS_SPACE_UNRESTRICTED (~0)
#ifdef _KERNEL
/*
* address relocation table
*/
#define BUS_SPACE_IAT_MAXSIZE 33
typedef bus_addr_t *bus_space_iat_t;
#define BUS_SPACE_IAT_SZ(IOTARRAY) (sizeof(IOTARRAY)/sizeof(bus_addr_t))
/*
* Access methods for bus resources and address space.
*/
struct resource;
/*
* bus space tag
*/
#define _PASCAL_CALL (void)
#define _BUS_SPACE_CALL_FUNCS_TAB(NAME,TYPE,BWN) \
NAME##_space_read_##BWN, \
NAME##_space_read_multi_##BWN, \
NAME##_space_read_region_##BWN, \
NAME##_space_write_##BWN, \
NAME##_space_write_multi_##BWN, \
NAME##_space_write_region_##BWN, \
NAME##_space_set_multi_##BWN, \
NAME##_space_set_region_##BWN, \
NAME##_space_copy_region_##BWN
#define _BUS_SPACE_CALL_FUNCS_PROTO(NAME,TYPE,BWN) \
TYPE NAME##_space_read_##BWN _PASCAL_CALL; \
void NAME##_space_read_multi_##BWN _PASCAL_CALL; \
void NAME##_space_read_region_##BWN _PASCAL_CALL; \
void NAME##_space_write_##BWN _PASCAL_CALL; \
void NAME##_space_write_multi_##BWN _PASCAL_CALL; \
void NAME##_space_write_region_##BWN _PASCAL_CALL; \
void NAME##_space_set_multi_##BWN _PASCAL_CALL; \
void NAME##_space_set_region_##BWN _PASCAL_CALL; \
void NAME##_space_copy_region_##BWN _PASCAL_CALL;
#define _BUS_SPACE_CALL_FUNCS(NAME,TYPE,BWN) \
TYPE (* NAME##_read_##BWN) _PASCAL_CALL; \
void (* NAME##_read_multi_##BWN) _PASCAL_CALL; \
void (* NAME##_read_region_##BWN) _PASCAL_CALL; \
void (* NAME##_write_##BWN) _PASCAL_CALL; \
void (* NAME##_write_multi_##BWN) _PASCAL_CALL; \
void (* NAME##_write_region_##BWN) _PASCAL_CALL; \
void (* NAME##_set_multi_##BWN) _PASCAL_CALL; \
void (* NAME##_set_region_##BWN) _PASCAL_CALL; \
void (* NAME##_copy_region_##BWN) _PASCAL_CALL;
struct bus_space_access_methods {
/* 8 bits access methods */
_BUS_SPACE_CALL_FUNCS(bs,u_int8_t,1)
/* 16 bits access methods */
_BUS_SPACE_CALL_FUNCS(bs,u_int16_t,2)
/* 32 bits access methods */
_BUS_SPACE_CALL_FUNCS(bs,u_int32_t,4)
};
/*
* Access methods for bus resources and address space.
*/
struct bus_space_tag {
#define BUS_SPACE_TAG_IO 0
#define BUS_SPACE_TAG_MEM 1
u_int bs_tag; /* bus space flags */
struct bus_space_access_methods bs_da; /* direct access */
struct bus_space_access_methods bs_ra; /* relocate access */
#if 0
struct bus_space_access_methods bs_ida; /* indexed direct access */
#endif
};
/*
* bus space handle
*/
struct bus_space_handle {
bus_addr_t bsh_base;
size_t bsh_sz;
bus_addr_t bsh_iat[BUS_SPACE_IAT_MAXSIZE];
size_t bsh_maxiatsz;
size_t bsh_iatsz;
struct resource **bsh_res;
size_t bsh_ressz;
struct bus_space_access_methods bsh_bam;
};
/*
* Values for the pc98 bus space tag, not to be used directly by MI code.
*/
extern struct bus_space_tag SBUS_io_space_tag;
extern struct bus_space_tag SBUS_mem_space_tag;
#define X86_BUS_SPACE_IO (&SBUS_io_space_tag)
#define X86_BUS_SPACE_MEM (&SBUS_mem_space_tag)
/*
* Allocate/Free bus_space_handle
*/
int i386_bus_space_handle_alloc(bus_space_tag_t t, bus_addr_t bpa,
bus_size_t size, bus_space_handle_t *bshp);
void i386_bus_space_handle_free(bus_space_tag_t t, bus_space_handle_t bsh,
size_t size);
/*
* int bus_space_map (bus_space_tag_t t, bus_addr_t addr,
* bus_size_t size, int flag, bus_space_handle_t *bshp);
*
* Map a region of bus space.
*/
int i386_memio_map(bus_space_tag_t t, bus_addr_t addr, bus_size_t size,
int flag, bus_space_handle_t *bshp);
#define bus_space_map(t, a, s, f, hp) \
i386_memio_map((t), (a), (s), (f), (hp))
/*
* int bus_space_unmap (bus_space_tag_t t,
* bus_space_handle_t bsh, bus_size_t size);
*
* Unmap a region of bus space.
*/
void i386_memio_unmap(bus_space_tag_t t, bus_space_handle_t bsh,
bus_size_t size);
#define bus_space_unmap(t, h, s) \
i386_memio_unmap((t), (h), (s))
/*
* int bus_space_map_load (bus_space_tag_t t, bus_space_handle_t bsh,
* bus_size_t size, bus_space_iat_t iat, u_int flags);
*
* Load I/O address table of bus space.
*/
int i386_memio_map_load(bus_space_tag_t t, bus_space_handle_t bsh,
bus_size_t size, bus_space_iat_t iat, u_int flags);
#define bus_space_map_load(t, h, s, iat, f) \
i386_memio_map_load((t), (h), (s), (iat), (f))
/*
* int bus_space_subregion (bus_space_tag_t t,
* bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
* bus_space_handle_t *nbshp);
*
* Get a new handle for a subregion of an already-mapped area of bus space.
*/
int i386_memio_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
bus_size_t offset, bus_size_t size,
bus_space_handle_t *nbshp);
#define bus_space_subregion(t, h, o, s, nhp) \
i386_memio_subregion((t), (h), (o), (s), (nhp))
/*
* int bus_space_free (bus_space_tag_t t,
* bus_space_handle_t bsh, bus_size_t size);
*
* Free a region of bus space.
*/
void i386_memio_free(bus_space_tag_t t, bus_space_handle_t bsh,
bus_size_t size);
#define bus_space_free(t, h, s) \
i386_memio_free((t), (h), (s))
/*
* int bus_space_compare (bus_space_tag_t t1, bus_space_handle_t bsh1,
* bus_space_tag_t t2, bus_space_handle_t bsh2);
*
* Compare two resources.
*/
int i386_memio_compare(bus_space_tag_t t1, bus_space_handle_t bsh1,
bus_space_tag_t t2, bus_space_handle_t bsh2);
#define bus_space_compare(t1, h1, t2, h2) \
i386_memio_compare((t1), (h1), (t2), (h2))
/*
* Access methods for bus resources and address space.
*/
#define _BUS_ACCESS_METHODS_PROTO(TYPE,BWN) \
static __inline TYPE bus_space_read_##BWN \
(bus_space_tag_t, bus_space_handle_t, bus_size_t offset); \
static __inline void bus_space_read_multi_##BWN \
(bus_space_tag_t, bus_space_handle_t, \
bus_size_t, TYPE *, size_t); \
static __inline void bus_space_read_region_##BWN \
(bus_space_tag_t, bus_space_handle_t, \
bus_size_t, TYPE *, size_t); \
static __inline void bus_space_write_##BWN \
(bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE); \
static __inline void bus_space_write_multi_##BWN \
(bus_space_tag_t, bus_space_handle_t, \
bus_size_t, const TYPE *, size_t); \
static __inline void bus_space_write_region_##BWN \
(bus_space_tag_t, bus_space_handle_t, \
bus_size_t, const TYPE *, size_t); \
static __inline void bus_space_set_multi_##BWN \
(bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE, size_t);\
static __inline void bus_space_set_region_##BWN \
(bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE, size_t);\
static __inline void bus_space_copy_region_##BWN \
(bus_space_tag_t, bus_space_handle_t, bus_size_t, \
bus_space_handle_t, bus_size_t, size_t);
_BUS_ACCESS_METHODS_PROTO(u_int8_t,1)
_BUS_ACCESS_METHODS_PROTO(u_int16_t,2)
_BUS_ACCESS_METHODS_PROTO(u_int32_t,4)
/*
* read methods
*/
#define _BUS_SPACE_READ(TYPE,BWN) \
static __inline TYPE \
bus_space_read_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
bus_size_t offset) \
{ \
register TYPE result; \
\
__asm __volatile("call *%2" \
:"=a" (result), \
"=d" (offset) \
:"o" (bsh->bsh_bam.bs_read_##BWN), \
"b" (bsh), \
"1" (offset) \
); \
\
return result; \
}
_BUS_SPACE_READ(u_int8_t,1)
_BUS_SPACE_READ(u_int16_t,2)
_BUS_SPACE_READ(u_int32_t,4)
/*
* write methods
*/
#define _BUS_SPACE_WRITE(TYPE,BWN) \
static __inline void \
bus_space_write_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
bus_size_t offset, TYPE val) \
{ \
\
__asm __volatile("call *%1" \
:"=d" (offset) \
:"o" (bsh->bsh_bam.bs_write_##BWN), \
"a" (val), \
"b" (bsh), \
"0" (offset) \
); \
}
_BUS_SPACE_WRITE(u_int8_t,1)
_BUS_SPACE_WRITE(u_int16_t,2)
_BUS_SPACE_WRITE(u_int32_t,4)
/*
* multi read
*/
#define _BUS_SPACE_READ_MULTI(TYPE,BWN) \
static __inline void \
bus_space_read_multi_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
bus_size_t offset, TYPE *buf, size_t cnt) \
{ \
\
__asm __volatile("call *%3" \
:"=c" (cnt), \
"=d" (offset), \
"=D" (buf) \
:"o" (bsh->bsh_bam.bs_read_multi_##BWN), \
"b" (bsh), \
"0" (cnt), \
"1" (offset), \
"2" (buf) \
:"memory"); \
}
_BUS_SPACE_READ_MULTI(u_int8_t,1)
_BUS_SPACE_READ_MULTI(u_int16_t,2)
_BUS_SPACE_READ_MULTI(u_int32_t,4)
/*
* multi write
*/
#define _BUS_SPACE_WRITE_MULTI(TYPE,BWN) \
static __inline void \
bus_space_write_multi_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
bus_size_t offset, const TYPE *buf, size_t cnt) \
{ \
\
__asm __volatile("call *%3" \
:"=c" (cnt), \
"=d" (offset), \
"=S" (buf) \
:"o" (bsh->bsh_bam.bs_write_multi_##BWN), \
"b" (bsh), \
"0" (cnt), \
"1" (offset), \
"2" (buf) \
); \
}
_BUS_SPACE_WRITE_MULTI(u_int8_t,1)
_BUS_SPACE_WRITE_MULTI(u_int16_t,2)
_BUS_SPACE_WRITE_MULTI(u_int32_t,4)
/*
* region read
*/
#define _BUS_SPACE_READ_REGION(TYPE,BWN) \
static __inline void \
bus_space_read_region_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
bus_size_t offset, TYPE *buf, size_t cnt) \
{ \
\
__asm __volatile("call *%3" \
:"=c" (cnt), \
"=d" (offset), \
"=D" (buf) \
:"o" (bsh->bsh_bam.bs_read_region_##BWN), \
"b" (bsh), \
"0" (cnt), \
"1" (offset), \
"2" (buf) \
:"memory"); \
}
_BUS_SPACE_READ_REGION(u_int8_t,1)
_BUS_SPACE_READ_REGION(u_int16_t,2)
_BUS_SPACE_READ_REGION(u_int32_t,4)
/*
* region write
*/
#define _BUS_SPACE_WRITE_REGION(TYPE,BWN) \
static __inline void \
bus_space_write_region_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
bus_size_t offset, const TYPE *buf, size_t cnt) \
{ \
\
__asm __volatile("call *%3" \
:"=c" (cnt), \
"=d" (offset), \
"=S" (buf) \
:"o" (bsh->bsh_bam.bs_write_region_##BWN), \
"b" (bsh), \
"0" (cnt), \
"1" (offset), \
"2" (buf) \
); \
}
_BUS_SPACE_WRITE_REGION(u_int8_t,1)
_BUS_SPACE_WRITE_REGION(u_int16_t,2)
_BUS_SPACE_WRITE_REGION(u_int32_t,4)
/*
* multi set
*/
#define _BUS_SPACE_SET_MULTI(TYPE,BWN) \
static __inline void \
bus_space_set_multi_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
bus_size_t offset, TYPE val, size_t cnt) \
{ \
\
__asm __volatile("call *%2" \
:"=c" (cnt), \
"=d" (offset) \
:"o" (bsh->bsh_bam.bs_set_multi_##BWN), \
"a" (val), \
"b" (bsh), \
"0" (cnt), \
"1" (offset) \
); \
}
_BUS_SPACE_SET_MULTI(u_int8_t,1)
_BUS_SPACE_SET_MULTI(u_int16_t,2)
_BUS_SPACE_SET_MULTI(u_int32_t,4)
/*
* region set
*/
#define _BUS_SPACE_SET_REGION(TYPE,BWN) \
static __inline void \
bus_space_set_region_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
bus_size_t offset, TYPE val, size_t cnt) \
{ \
\
__asm __volatile("call *%2" \
:"=c" (cnt), \
"=d" (offset) \
:"o" (bsh->bsh_bam.bs_set_region_##BWN), \
"a" (val), \
"b" (bsh), \
"0" (cnt), \
"1" (offset) \
); \
}
_BUS_SPACE_SET_REGION(u_int8_t,1)
_BUS_SPACE_SET_REGION(u_int16_t,2)
_BUS_SPACE_SET_REGION(u_int32_t,4)
/*
* copy
*/
#define _BUS_SPACE_COPY_REGION(BWN) \
static __inline void \
bus_space_copy_region_##BWN (bus_space_tag_t tag, bus_space_handle_t sbsh, \
bus_size_t src, bus_space_handle_t dbsh, bus_size_t dst, size_t cnt) \
{ \
\
if (dbsh->bsh_bam.bs_copy_region_1 != sbsh->bsh_bam.bs_copy_region_1) \
panic("bus_space_copy_region: funcs mismatch (ENOSUPPORT)");\
\
__asm __volatile("call *%3" \
:"=c" (cnt), \
"=S" (src), \
"=D" (dst) \
:"o" (dbsh->bsh_bam.bs_copy_region_##BWN), \
"a" (sbsh), \
"b" (dbsh), \
"0" (cnt), \
"1" (src), \
"2" (dst) \
); \
}
_BUS_SPACE_COPY_REGION(1)
_BUS_SPACE_COPY_REGION(2)
_BUS_SPACE_COPY_REGION(4)
/*
* Bus read/write barrier methods.
*
* void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh,
* bus_size_t offset, bus_size_t len, int flags);
*
*
* Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than
* prevent reordering by the compiler; all Intel x86 processors currently
* retire operations outside the CPU in program order.
*/
#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
static __inline void
bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh,
bus_size_t offset, bus_size_t len, int flags)
{
if (flags & BUS_SPACE_BARRIER_READ)
__asm __volatile("lock; addl $0,0(%%esp)" : : : "memory");
else
__compiler_membar();
}
#ifdef BUS_SPACE_NO_LEGACY
#undef inb
#undef outb
#define inb(a) compiler_error
#define inw(a) compiler_error
#define inl(a) compiler_error
#define outb(a, b) compiler_error
#define outw(a, b) compiler_error
#define outl(a, b) compiler_error
#endif
#include <machine/bus_dma.h>
/*
* Stream accesses are the same as normal accesses on i386/pc98; there are no
* supported bus systems with an endianess different from the host one.
*/
#define bus_space_read_stream_1(t, h, o) bus_space_read_1((t), (h), (o))
#define bus_space_read_stream_2(t, h, o) bus_space_read_2((t), (h), (o))
#define bus_space_read_stream_4(t, h, o) bus_space_read_4((t), (h), (o))
#define bus_space_read_multi_stream_1(t, h, o, a, c) \
bus_space_read_multi_1((t), (h), (o), (a), (c))
#define bus_space_read_multi_stream_2(t, h, o, a, c) \
bus_space_read_multi_2((t), (h), (o), (a), (c))
#define bus_space_read_multi_stream_4(t, h, o, a, c) \
bus_space_read_multi_4((t), (h), (o), (a), (c))
#define bus_space_write_stream_1(t, h, o, v) \
bus_space_write_1((t), (h), (o), (v))
#define bus_space_write_stream_2(t, h, o, v) \
bus_space_write_2((t), (h), (o), (v))
#define bus_space_write_stream_4(t, h, o, v) \
bus_space_write_4((t), (h), (o), (v))
#define bus_space_write_multi_stream_1(t, h, o, a, c) \
bus_space_write_multi_1((t), (h), (o), (a), (c))
#define bus_space_write_multi_stream_2(t, h, o, a, c) \
bus_space_write_multi_2((t), (h), (o), (a), (c))
#define bus_space_write_multi_stream_4(t, h, o, a, c) \
bus_space_write_multi_4((t), (h), (o), (a), (c))
#define bus_space_set_multi_stream_1(t, h, o, v, c) \
bus_space_set_multi_1((t), (h), (o), (v), (c))
#define bus_space_set_multi_stream_2(t, h, o, v, c) \
bus_space_set_multi_2((t), (h), (o), (v), (c))
#define bus_space_set_multi_stream_4(t, h, o, v, c) \
bus_space_set_multi_4((t), (h), (o), (v), (c))
#define bus_space_read_region_stream_1(t, h, o, a, c) \
bus_space_read_region_1((t), (h), (o), (a), (c))
#define bus_space_read_region_stream_2(t, h, o, a, c) \
bus_space_read_region_2((t), (h), (o), (a), (c))
#define bus_space_read_region_stream_4(t, h, o, a, c) \
bus_space_read_region_4((t), (h), (o), (a), (c))
#define bus_space_write_region_stream_1(t, h, o, a, c) \
bus_space_write_region_1((t), (h), (o), (a), (c))
#define bus_space_write_region_stream_2(t, h, o, a, c) \
bus_space_write_region_2((t), (h), (o), (a), (c))
#define bus_space_write_region_stream_4(t, h, o, a, c) \
bus_space_write_region_4((t), (h), (o), (a), (c))
#define bus_space_set_region_stream_1(t, h, o, v, c) \
bus_space_set_region_1((t), (h), (o), (v), (c))
#define bus_space_set_region_stream_2(t, h, o, v, c) \
bus_space_set_region_2((t), (h), (o), (v), (c))
#define bus_space_set_region_stream_4(t, h, o, v, c) \
bus_space_set_region_4((t), (h), (o), (v), (c))
#define bus_space_copy_region_stream_1(t, h1, o1, h2, o2, c) \
bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
#define bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c) \
bus_space_copy_region_2((t), (h1), (o1), (h2), (o2), (c))
#define bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \
bus_space_copy_region_4((t), (h1), (o1), (h2), (o2), (c))
#endif /* _KERNEL */
#endif /* _PC98_BUS_H_ */
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