42a12b2bd8
distribution to a MI header so it can be shared with other architectures.
244 lines
6.2 KiB
C
244 lines
6.2 KiB
C
/*-
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* Copyright (c) 2001 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "acpi.h"
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#include <dev/acpica/madt.h>
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#include <machine/md_var.h>
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extern u_int64_t ia64_lapic_address;
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struct sapic *sapic_create(int, int, u_int64_t);
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static void
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print_entry(APIC_HEADER *entry)
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{
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switch (entry->Type) {
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case APIC_INTERRUPT_SOURCE_OVERRIDE: {
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INTERRUPT_SOURCE_OVERRIDE *iso =
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(INTERRUPT_SOURCE_OVERRIDE *)entry;
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printf("\tInterrupt source override entry\n");
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printf("\t\tBus=%d, Source=%d, Irq=0x%x\n", iso->Bus,
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iso->Source, iso->GlobalSystemInterrupt);
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break;
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}
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case APIC_IO:
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printf("\tI/O APIC entry\n");
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break;
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case APIC_IO_SAPIC: {
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IO_SAPIC *sapic = (IO_SAPIC *)entry;
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printf("\tI/O SAPIC entry\n");
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printf("\t\tId=0x%x, Vector=0x%x, Address=0x%lx\n",
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sapic->IoSapicId, sapic->Vector, sapic->IoSapicAddress);
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break;
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}
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case APIC_LOCAL_APIC_NMI:
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printf("\tLocal APIC NMI entry\n");
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break;
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case APIC_LOCAL_APIC_OVERRIDE: {
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LAPIC_OVERRIDE *lapic = (LAPIC_OVERRIDE *)entry;
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printf("\tLocal APIC override entry\n");
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printf("\t\tLocal APIC address=0x%lx\n",
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lapic->LocalApicAddress);
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break;
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}
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case APIC_LOCAL_SAPIC: {
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LOCAL_SAPIC *sapic = (LOCAL_SAPIC *)entry;
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printf("\tLocal SAPIC entry\n");
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printf("\t\tProcessorId=0x%x, Id=0x%x, Eid=0x%x",
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sapic->ProcessorId, sapic->LocalSapicId,
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sapic->LocalSapicEid);
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if (!sapic->ProcessorEnabled)
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printf(" (disabled)");
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printf("\n");
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break;
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}
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case APIC_NMI:
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printf("\tNMI entry\n");
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break;
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case APIC_PLATFORM_INTERRUPT: {
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PLATFORM_INTERRUPT_SOURCE *pis =
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(PLATFORM_INTERRUPT_SOURCE *)entry;
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printf("\tPlatform interrupt entry\n");
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printf("\t\tPolarity=%d, TriggerMode=%d, Id=0x%x, "
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"Eid=0x%x, Vector=0x%x, Irq=%d\n",
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pis->Polarity, pis->TriggerMode, pis->ProcessorId,
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pis->ProcessorEid, pis->IoSapicVector,
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pis->GlobalSystemInterrupt);
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break;
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}
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case APIC_PROC:
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printf("\tLocal APIC entry\n");
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break;
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default:
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printf("\tUnknown type %d entry\n", entry->Type);
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break;
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}
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}
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void
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ia64_probe_sapics(void)
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{
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ACPI_POINTER rsdp_ptr;
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APIC_HEADER *entry;
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APIC_TABLE *table;
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RSDP_DESCRIPTOR *rsdp;
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XSDT_DESCRIPTOR *xsdt;
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char *end, *p;
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int t, tables;
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if (AcpiOsGetRootPointer(ACPI_LOGICAL_ADDRESSING, &rsdp_ptr) != AE_OK)
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return;
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rsdp = (RSDP_DESCRIPTOR *)IA64_PHYS_TO_RR7(rsdp_ptr.Pointer.Physical);
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xsdt = (XSDT_DESCRIPTOR *)IA64_PHYS_TO_RR7(rsdp->XsdtPhysicalAddress);
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tables = (UINT64 *)((char *)xsdt + xsdt->Header.Length) -
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xsdt->TableOffsetEntry;
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for (t = 0; t < tables; t++) {
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table = (APIC_TABLE *)
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IA64_PHYS_TO_RR7(xsdt->TableOffsetEntry[t]);
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if (bootverbose)
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printf("Table '%c%c%c%c' at %p\n",
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table->Header.Signature[0],
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table->Header.Signature[1],
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table->Header.Signature[2],
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table->Header.Signature[3], table);
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if (strncmp(table->Header.Signature, APIC_SIG, 4) != 0)
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continue;
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/* Save the address of the processor interrupt block. */
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if (bootverbose)
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printf("\tLocal APIC address=0x%x\n",
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table->LocalApicAddress);
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ia64_lapic_address = table->LocalApicAddress;
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end = (char *)table + table->Header.Length;
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p = (char *)(table + 1);
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while (p < end) {
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entry = (APIC_HEADER *)p;
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if (bootverbose)
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print_entry(entry);
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switch (entry->Type) {
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case APIC_IO_SAPIC: {
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IO_SAPIC *sapic = (IO_SAPIC *)entry;
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sapic_create(sapic->IoSapicId, sapic->Vector,
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sapic->IoSapicAddress);
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break;
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}
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case APIC_LOCAL_APIC_OVERRIDE: {
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LAPIC_OVERRIDE *lapic = (LAPIC_OVERRIDE*)entry;
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ia64_lapic_address = lapic->LocalApicAddress;
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break;
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}
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#ifdef SMP
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case APIC_LOCAL_SAPIC: {
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LOCAL_SAPIC *sapic = (LOCAL_SAPIC *)entry;
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if (sapic->ProcessorEnabled)
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cpu_mp_add(sapic->ProcessorId,
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sapic->LocalSapicId,
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sapic->LocalSapicEid);
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break;
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}
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#endif
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default:
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break;
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}
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p += entry->Length;
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}
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}
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}
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/*
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* Count the number of local SAPIC entries in the APIC table. Every enabled
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* entry corresponds to a processor.
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*/
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int
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ia64_count_cpus(void)
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{
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ACPI_POINTER rsdp_ptr;
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APIC_TABLE *table;
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LOCAL_SAPIC *entry;
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RSDP_DESCRIPTOR *rsdp;
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XSDT_DESCRIPTOR *xsdt;
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char *end, *p;
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int cpus, t, tables;
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if (AcpiOsGetRootPointer(ACPI_LOGICAL_ADDRESSING, &rsdp_ptr) != AE_OK)
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return (0);
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rsdp = (RSDP_DESCRIPTOR *)IA64_PHYS_TO_RR7(rsdp_ptr.Pointer.Physical);
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xsdt = (XSDT_DESCRIPTOR *)IA64_PHYS_TO_RR7(rsdp->XsdtPhysicalAddress);
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tables = (UINT64 *)((char *)xsdt + xsdt->Header.Length) -
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xsdt->TableOffsetEntry;
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cpus = 0;
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for (t = 0; t < tables; t++) {
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table = (APIC_TABLE *)
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IA64_PHYS_TO_RR7(xsdt->TableOffsetEntry[t]);
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if (strncmp(table->Header.Signature, APIC_SIG, 4) != 0)
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continue;
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end = (char *)table + table->Header.Length;
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p = (char *)(table + 1);
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while (p < end) {
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entry = (LOCAL_SAPIC *)p;
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if (entry->Header.Type == APIC_LOCAL_SAPIC &&
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entry->ProcessorEnabled)
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cpus++;
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p += entry->Header.Length;
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}
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}
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return (cpus);
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}
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