1e9538d253
The TOE engine in Chelsio T6 adapters supports offloading of TLS encryption and TCP segmentation for offloaded connections. Sockets using TLS are required to use a set of custom socket options to upload RX and TX keys to the NIC and to enable RX processing. Currently these socket options are implemented as TCP options in the vendor specific range. A patched OpenSSL library will be made available in a port / package for use with the TLS TOE support. TOE sockets can either offload both transmit and reception of TLS records or just transmit. TLS offload (both RX and TX) is enabled by setting the dev.t6nex.<x>.tls sysctl to 1 and requires TOE to be enabled on the relevant interface. Transmit offload can be used on any "normal" or TLS TOE socket by using the custom socket option to program a transmit key. This permits most TOE sockets to transparently offload TLS when applications use a patched SSL library (e.g. using LD_LIBRARY_PATH to request use of a patched OpenSSL library). Receive offload can only be used with TOE sockets using the TLS mode. The dev.t6nex.0.toe.tls_rx_ports sysctl can be set to a list of TCP port numbers. Any connection with either a local or remote port number in that list will be created as a TLS socket rather than a plain TOE socket. Note that although this sysctl accepts an arbitrary list of port numbers, the sysctl(8) tool is only able to set sysctl nodes to a single value. A TLS socket will hang without receiving data if used by an application that is not using a patched SSL library. Thus, the tls_rx_ports node should be used with care. For a server mostly concerned with offloading TLS transmit, this node is not needed as plain TOE sockets will fall back to software crypto when using an unpatched SSL library. New per-interface statistics nodes are added giving counts of TLS packets and payload bytes (payload bytes do not include TLS headers or authentication tags/MACs) offloaded via the TOE engine, e.g.: dev.cc.0.stats.rx_tls_octets: 149 dev.cc.0.stats.rx_tls_records: 13 dev.cc.0.stats.tx_tls_octets: 26501823 dev.cc.0.stats.tx_tls_records: 1620 TLS transmit work requests are constructed by a new variant of t4_push_frames() called t4_push_tls_records() in tom/t4_tls.c. TLS transmit work requests require a buffer containing IVs. If the IVs are too large to fit into the work request, a separate buffer is allocated when constructing a work request. This buffer is associated with the transmit descriptor and freed when the descriptor is ACKed by the adapter. Received TLS frames use two new CPL messages. The first message is a CPL_TLS_DATA containing the decryped payload of a single TLS record. The handler places the mbuf containing the received payload on an mbufq in the TOE pcb. The second message is a CPL_RX_TLS_CMP message which includes a copy of the TLS header and indicates if there were any errors. The handler for this message places the TLS header into the socket buffer followed by the saved mbuf with the payload data. Both of these handlers are contained in tom/t4_tls.c. A few routines were exposed from t4_cpl_io.c for use by t4_tls.c including send_rx_credits(), a new send_rx_modulate(), and t4_close_conn(). TLS keys for both transmit and receive are stored in onboard memory in the NIC in the "TLS keys" memory region. In some cases a TLS socket can hang with pending data available in the NIC that is not delivered to the host. As a workaround, TLS sockets are more aggressive about sending CPL_RX_DATA_ACK messages anytime that any data is read from a TLS socket. In addition, a fallback timer will periodically send CPL_RX_DATA_ACK messages to the NIC for connections that are still in the handshake phase. Once the connection has finished the handshake and programmed RX keys via the socket option, the timer is stopped. A new function select_ulp_mode() is used to determine what sub-mode a given TOE socket should use (plain TOE, DDP, or TLS). The existing set_tcpddp_ulp_mode() function has been renamed to set_ulp_mode() and handles initialization of TLS-specific state when necessary in addition to DDP-specific state. Since TLS sockets do not receive individual TCP segments but always receive full TLS records, they can receive more data than is available in the current window (e.g. if a 16k TLS record is received but the socket buffer is itself 16k). To cope with this, just drop the window to 0 when this happens, but track the overage and "eat" the overage as it is read from the socket buffer not opening the window (or adding rx_credits) for the overage bytes. Reviewed by: np (earlier version) Sponsored by: Chelsio Communications Differential Revision: https://reviews.freebsd.org/D14529
282 lines
5.8 KiB
Plaintext
282 lines
5.8 KiB
Plaintext
# Firmware configuration file.
|
|
#
|
|
# Global limits (some are hardware limits, others are due to the firmware).
|
|
# nvi = 128 virtual interfaces
|
|
# niqflint = 1023 ingress queues with freelists and/or interrupts
|
|
# nethctrl = 64K Ethernet or ctrl egress queues
|
|
# neq = 64K egress queues of all kinds, including freelists
|
|
# nexactf = 512 MPS TCAM entries, can oversubscribe.
|
|
|
|
[global]
|
|
rss_glb_config_mode = basicvirtual
|
|
rss_glb_config_options = tnlmapen,hashtoeplitz,tnlalllkp
|
|
|
|
# PL_TIMEOUT register
|
|
pl_timeout_value = 200 # the timeout value in units of us
|
|
|
|
sge_timer_value = 1, 5, 10, 50, 100, 200 # SGE_TIMER_VALUE* in usecs
|
|
|
|
reg[0x10c4] = 0x20000000/0x20000000 # GK_CONTROL, enable 5th thread
|
|
|
|
reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT
|
|
|
|
#Tick granularities in kbps
|
|
tsch_ticks = 100000, 10000, 1000, 10
|
|
|
|
filterMode = fragmentation, mpshittype, protocol, vlan, port, fcoe
|
|
filterMask = protocol
|
|
|
|
tp_pmrx = 36, 512
|
|
tp_pmrx_pagesize = 64K
|
|
|
|
# TP number of RX channels (0 = auto)
|
|
tp_nrxch = 0
|
|
|
|
tp_pmtx = 46, 512
|
|
tp_pmtx_pagesize = 64K
|
|
|
|
# TP number of TX channels (0 = auto)
|
|
tp_ntxch = 0
|
|
|
|
# TP OFLD MTUs
|
|
tp_mtus = 88, 256, 512, 576, 808, 1024, 1280, 1488, 1500, 2002, 2048, 4096, 4352, 8192, 9000, 9600
|
|
|
|
# enable TP_OUT_CONFIG.IPIDSPLITMODE and CRXPKTENC
|
|
reg[0x7d04] = 0x00010008/0x00010008
|
|
|
|
# TP_GLOBAL_CONFIG
|
|
reg[0x7d08] = 0x00000800/0x00000800 # set IssFromCplEnable
|
|
|
|
# TP_PC_CONFIG
|
|
reg[0x7d48] = 0x00000000/0x00000400 # clear EnableFLMError
|
|
|
|
# TP_PARA_REG0
|
|
reg[0x7d60] = 0x06000000/0x07000000 # set InitCWND to 6
|
|
|
|
# cluster, lan, or wan.
|
|
tp_tcptuning = lan
|
|
|
|
# LE_DB_CONFIG
|
|
reg[0x19c04] = 0x00000000/0x00440000 # LE Server SRAM disabled
|
|
# LE IPv4 compression disabled
|
|
# LE_DB_HASH_CONFIG
|
|
reg[0x19c28] = 0x00800000/0x01f00000 # LE Hash bucket size 8,
|
|
|
|
# ULP_TX_CONFIG
|
|
reg[0x8dc0] = 0x00000104/0x00000104 # Enable ITT on PI err
|
|
# Enable more error msg for ...
|
|
# TPT error.
|
|
|
|
# ULP_RX_MISC_FEATURE_ENABLE
|
|
#reg[0x1925c] = 0x01003400/0x01003400 # iscsi tag pi bit
|
|
# Enable offset decrement after ...
|
|
# PI extraction and before DDP
|
|
# ulp insert pi source info in DIF
|
|
# iscsi_eff_offset_en
|
|
|
|
#Enable iscsi completion moderation feature
|
|
reg[0x1925c] = 0x000041c0/0x000031c0 # Enable offset decrement after
|
|
# PI extraction and before DDP.
|
|
# ulp insert pi source info in
|
|
# DIF.
|
|
# Enable iscsi hdr cmd mode.
|
|
# iscsi force cmd mode.
|
|
# Enable iscsi cmp mode.
|
|
# MC configuration
|
|
#mc_mode_brc[0] = 1 # mc0 - 1: enable BRC, 0: enable RBC
|
|
|
|
# PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by
|
|
# these 4 PFs only.
|
|
[function "0"]
|
|
nvf = 4
|
|
wx_caps = all
|
|
r_caps = all
|
|
nvi = 2
|
|
rssnvi = 2
|
|
niqflint = 4
|
|
nethctrl = 4
|
|
neq = 8
|
|
nexactf = 4
|
|
cmask = all
|
|
pmask = 0x1
|
|
|
|
[function "1"]
|
|
nvf = 4
|
|
wx_caps = all
|
|
r_caps = all
|
|
nvi = 2
|
|
rssnvi = 2
|
|
niqflint = 4
|
|
nethctrl = 4
|
|
neq = 8
|
|
nexactf = 4
|
|
cmask = all
|
|
pmask = 0x2
|
|
|
|
[function "2"]
|
|
nvf = 4
|
|
wx_caps = all
|
|
r_caps = all
|
|
nvi = 2
|
|
rssnvi = 2
|
|
niqflint = 4
|
|
nethctrl = 4
|
|
neq = 8
|
|
nexactf = 4
|
|
cmask = all
|
|
pmask = 0x4
|
|
|
|
[function "3"]
|
|
nvf = 4
|
|
wx_caps = all
|
|
r_caps = all
|
|
nvi = 2
|
|
rssnvi = 2
|
|
niqflint = 4
|
|
nethctrl = 4
|
|
neq = 8
|
|
nexactf = 4
|
|
cmask = all
|
|
pmask = 0x8
|
|
|
|
# PF4 is the resource-rich PF that the bus/nexus driver attaches to.
|
|
# It gets 32 MSI/128 MSI-X vectors.
|
|
[function "4"]
|
|
wx_caps = all
|
|
r_caps = all
|
|
nvi = 32
|
|
rssnvi = 8
|
|
niqflint = 512
|
|
nethctrl = 1024
|
|
neq = 2048
|
|
nqpcq = 8192
|
|
nexactf = 456
|
|
cmask = all
|
|
pmask = all
|
|
ncrypto_lookaside = 16
|
|
nclip = 320
|
|
|
|
# TCAM has 6K cells; each region must start at a multiple of 128 cell.
|
|
# Each entry in these categories takes 2 cells each. nhash will use the
|
|
# TCAM iff there is room left (that is, the rest don't add up to 3072).
|
|
nfilter = 2032
|
|
nserver = 512
|
|
nhpfilter = 0
|
|
nhash = 16384
|
|
protocol = ofld, rddp, rdmac, iscsi_initiator_pdu, iscsi_target_pdu, iscsi_t10dif, tlskeys, crypto_lookaside
|
|
tp_l2t = 4096
|
|
tp_ddp = 2
|
|
tp_ddp_iscsi = 2
|
|
tp_tls_key = 3
|
|
tp_tls_mxrxsize = 17408 # 16384 + 1024, governs max rx data, pm max xfer len, rx coalesce sizes
|
|
tp_stag = 2
|
|
tp_pbl = 5
|
|
tp_rq = 7
|
|
tp_srq = 128
|
|
|
|
# PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors.
|
|
# Not used right now.
|
|
[function "5"]
|
|
nvi = 1
|
|
rssnvi = 0
|
|
|
|
# PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors.
|
|
# Not used right now.
|
|
[function "6"]
|
|
nvi = 1
|
|
rssnvi = 0
|
|
|
|
# The following function, 1023, is not an actual PCIE function but is used to
|
|
# configure and reserve firmware internal resources that come from the global
|
|
# resource pool.
|
|
#
|
|
[function "1023"]
|
|
wx_caps = all
|
|
r_caps = all
|
|
nvi = 4
|
|
rssnvi = 0
|
|
cmask = all
|
|
pmask = all
|
|
nexactf = 8
|
|
nfilter = 16
|
|
|
|
|
|
# For Virtual functions, we only allow NIC functionality and we only allow
|
|
# access to one port (1 << PF). Note that because of limitations in the
|
|
# Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL
|
|
# and GTS registers, the number of Ingress and Egress Queues must be a power
|
|
# of 2.
|
|
#
|
|
[function "0/*"]
|
|
wx_caps = 0x82
|
|
r_caps = 0x86
|
|
nvi = 1
|
|
rssnvi = 1
|
|
niqflint = 2
|
|
nethctrl = 2
|
|
neq = 4
|
|
nexactf = 2
|
|
cmask = all
|
|
pmask = 0x1
|
|
|
|
[function "1/*"]
|
|
wx_caps = 0x82
|
|
r_caps = 0x86
|
|
nvi = 1
|
|
rssnvi = 1
|
|
niqflint = 2
|
|
nethctrl = 2
|
|
neq = 4
|
|
nexactf = 2
|
|
cmask = all
|
|
pmask = 0x2
|
|
|
|
[function "2/*"]
|
|
wx_caps = 0x82
|
|
r_caps = 0x86
|
|
nvi = 1
|
|
rssnvi = 1
|
|
niqflint = 2
|
|
nethctrl = 2
|
|
neq = 4
|
|
nexactf = 2
|
|
cmask = all
|
|
pmask = 0x1
|
|
|
|
[function "3/*"]
|
|
wx_caps = 0x82
|
|
r_caps = 0x86
|
|
nvi = 1
|
|
rssnvi = 1
|
|
niqflint = 2
|
|
nethctrl = 2
|
|
neq = 4
|
|
nexactf = 2
|
|
cmask = all
|
|
pmask = 0x2
|
|
|
|
# MPS has 192K buffer space for ingress packets from the wire as well as
|
|
# loopback path of the L2 switch.
|
|
[port "0"]
|
|
dcb = none
|
|
#bg_mem = 25
|
|
#lpbk_mem = 25
|
|
hwm = 60
|
|
lwm = 15
|
|
dwm = 30
|
|
|
|
[port "1"]
|
|
dcb = none
|
|
#bg_mem = 25
|
|
#lpbk_mem = 25
|
|
hwm = 60
|
|
lwm = 15
|
|
dwm = 30
|
|
|
|
[fini]
|
|
version = 0x1
|
|
checksum = 0x9e8952d2
|
|
#
|
|
# $FreeBSD$
|
|
#
|