d85631c4ac
stolen from the ia64/ia32 code (indeed there was a repocopy), but I've redone the MD parts and added and fixed a few essential syscalls. It is sufficient to run i386 binaries like /bin/ls, /usr/bin/id (dynamic) and p4. The ia64 code has not implemented signal delivery, so I had to do that. Before you say it, yes, this does need to go in a common place. But we're in a freeze at the moment and I didn't want to risk breaking ia64. I will sort this out after the freeze so that the common code is in a common place. On the AMD64 side, this required adding segment selector context switch support and some other support infrastructure. The %fs/%gs etc code is hairy because loading %gs will clobber the kernel's current MSR_GSBASE setting. The segment selectors are not used by the kernel, so they're only changed at context switch time or when changing modes. This still needs to be optimized. Approved by: re (amd64/* blanket)
82 lines
2.8 KiB
C
82 lines
2.8 KiB
C
/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)pcb.h 5.10 (Berkeley) 5/12/91
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* $FreeBSD$
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*/
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#ifndef _I386_PCB_H_
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#define _I386_PCB_H_
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/*
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* Intel 386 process control block
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*/
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#include <machine/npx.h>
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struct pcb {
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register_t padxx[8];
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register_t pcb_cr3;
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register_t pcb_r15;
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register_t pcb_r14;
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register_t pcb_r13;
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register_t pcb_r12;
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register_t pcb_rbp;
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register_t pcb_rsp;
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register_t pcb_rbx;
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register_t pcb_rip;
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register_t pcb_rflags;
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register_t pcb_fsbase;
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register_t pcb_gsbase;
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register_t pcb_kgsbase;
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u_int32_t pcb_ds;
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u_int32_t pcb_es;
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u_int32_t pcb_fs;
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u_int32_t pcb_gs;
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struct savefpu pcb_save;
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u_long pcb_flags;
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#define PCB_NPXTRAP 0x01 /* npx trap pending */
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#define PCB_NPXINITDONE 0x02 /* fpu state is initialized */
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#define PCB_FULLCTX 0x04 /* full context restore on sysret */
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caddr_t pcb_onfault; /* copyin/out fault recovery */
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};
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#ifdef _KERNEL
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void savectx(struct pcb *);
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#endif
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#endif /* _I386_PCB_H_ */
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