d85631c4ac
stolen from the ia64/ia32 code (indeed there was a repocopy), but I've redone the MD parts and added and fixed a few essential syscalls. It is sufficient to run i386 binaries like /bin/ls, /usr/bin/id (dynamic) and p4. The ia64 code has not implemented signal delivery, so I had to do that. Before you say it, yes, this does need to go in a common place. But we're in a freeze at the moment and I didn't want to risk breaking ia64. I will sort this out after the freeze so that the common code is in a common place. On the AMD64 side, this required adding segment selector context switch support and some other support infrastructure. The %fs/%gs etc code is hairy because loading %gs will clobber the kernel's current MSR_GSBASE setting. The segment selectors are not used by the kernel, so they're only changed at context switch time or when changing modes. This still needs to be optimized. Approved by: re (amd64/* blanket)
290 lines
7.3 KiB
C
290 lines
7.3 KiB
C
/*-
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* Copyright (c) 2002 Doug Rabson
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* Copyright (c) 2003 Peter Wemm
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_compat.h"
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#define __ELF_WORD_SIZE 32
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#include <sys/param.h>
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#include <sys/exec.h>
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#include <sys/fcntl.h>
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#include <sys/imgact.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/mman.h>
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#include <sys/namei.h>
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#include <sys/pioctl.h>
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#include <sys/proc.h>
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#include <sys/procfs.h>
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#include <sys/resourcevar.h>
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#include <sys/systm.h>
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#include <sys/signalvar.h>
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#include <sys/stat.h>
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#include <sys/sx.h>
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#include <sys/syscall.h>
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#include <sys/sysctl.h>
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#include <sys/sysent.h>
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#include <sys/vnode.h>
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#include <sys/imgact_elf.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <vm/vm_param.h>
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#include <vm/pmap.h>
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#include <vm/vm_map.h>
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#include <vm/vm_object.h>
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#include <vm/vm_extern.h>
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#include <amd64/ia32/ia32_util.h>
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#include <amd64/ia32/ia32_proto.h>
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#include <amd64/ia32/ia32_signal.h>
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#include <machine/psl.h>
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#include <machine/segments.h>
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#include <machine/specialreg.h>
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#include <machine/frame.h>
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#include <machine/md_var.h>
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#include <machine/pcb.h>
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#include <machine/cpufunc.h>
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static register_t *ia32_copyout_strings(struct image_params *imgp);
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static void ia32_setregs(struct thread *td, u_long entry, u_long stack,
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u_long ps_strings);
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extern struct sysent ia32_sysent[];
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struct sysentvec ia32_freebsd_sysvec = {
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SYS_MAXSYSCALL,
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ia32_sysent,
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0,
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0,
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NULL,
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0,
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NULL,
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NULL,
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elf32_freebsd_fixup,
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ia32_sendsig,
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ia32_sigcode,
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&sz_ia32_sigcode,
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NULL,
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"FreeBSD ELF32",
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elf32_coredump,
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NULL,
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MINSIGSTKSZ,
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PAGE_SIZE,
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0,
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USRSTACK,
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USRSTACK,
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PS_STRINGS,
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VM_PROT_ALL,
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ia32_copyout_strings,
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ia32_setregs
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};
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static Elf32_Brandinfo ia32_brand_info = {
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ELFOSABI_FREEBSD,
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EM_386,
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"FreeBSD",
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"/compat/ia32",
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"/usr/libexec/ld-elf.so.1",
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&ia32_freebsd_sysvec
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};
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SYSINIT(ia32, SI_SUB_EXEC, SI_ORDER_ANY,
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(sysinit_cfunc_t) elf32_insert_brand_entry,
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&ia32_brand_info);
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extern int _ucode32sel, _udatasel;
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static register_t *
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ia32_copyout_strings(struct image_params *imgp)
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{
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int argc, envc;
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u_int32_t *vectp;
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char *stringp, *destp;
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u_int32_t *stack_base;
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struct ia32_ps_strings *arginfo;
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int szsigcode;
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/*
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* Calculate string base and vector table pointers.
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* Also deal with signal trampoline code for this exec type.
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*/
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arginfo = (struct ia32_ps_strings *)PS_STRINGS;
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szsigcode = *(imgp->proc->p_sysent->sv_szsigcode);
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destp = (caddr_t)arginfo - szsigcode - SPARE_USRSPACE -
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roundup((ARG_MAX - imgp->stringspace), sizeof(char *));
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/*
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* install sigcode
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*/
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if (szsigcode)
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copyout(imgp->proc->p_sysent->sv_sigcode,
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((caddr_t)arginfo - szsigcode), szsigcode);
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/*
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* If we have a valid auxargs ptr, prepare some room
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* on the stack.
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*/
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if (imgp->auxargs) {
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/*
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* 'AT_COUNT*2' is size for the ELF Auxargs data. This is for
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* lower compatibility.
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*/
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imgp->auxarg_size = (imgp->auxarg_size) ? imgp->auxarg_size
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: (AT_COUNT * 2);
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/*
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* The '+ 2' is for the null pointers at the end of each of
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* the arg and env vector sets,and imgp->auxarg_size is room
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* for argument of Runtime loader.
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*/
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vectp = (u_int32_t *) (destp - (imgp->argc + imgp->envc + 2 +
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imgp->auxarg_size) * sizeof(u_int32_t));
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} else
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/*
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* The '+ 2' is for the null pointers at the end of each of
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* the arg and env vector sets
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*/
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vectp = (u_int32_t *)
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(destp - (imgp->argc + imgp->envc + 2) * sizeof(u_int32_t));
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/*
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* vectp also becomes our initial stack base
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*/
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stack_base = vectp;
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stringp = imgp->stringbase;
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argc = imgp->argc;
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envc = imgp->envc;
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/*
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* Copy out strings - arguments and environment.
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*/
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copyout(stringp, destp, ARG_MAX - imgp->stringspace);
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/*
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* Fill in "ps_strings" struct for ps, w, etc.
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*/
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suword32(&arginfo->ps_argvstr, (u_int32_t)(intptr_t)vectp);
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suword32(&arginfo->ps_nargvstr, argc);
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/*
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* Fill in argument portion of vector table.
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*/
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for (; argc > 0; --argc) {
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suword32(vectp++, (u_int32_t)(intptr_t)destp);
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while (*stringp++ != 0)
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destp++;
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destp++;
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}
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/* a null vector table pointer separates the argp's from the envp's */
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suword32(vectp++, 0);
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suword32(&arginfo->ps_envstr, (u_int32_t)(intptr_t)vectp);
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suword32(&arginfo->ps_nenvstr, envc);
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/*
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* Fill in environment portion of vector table.
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*/
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for (; envc > 0; --envc) {
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suword32(vectp++, (u_int32_t)(intptr_t)destp);
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while (*stringp++ != 0)
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destp++;
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destp++;
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}
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/* end of vector table is a null pointer */
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suword32(vectp, 0);
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return ((register_t *)stack_base);
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}
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/*
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* Clear registers on exec
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*/
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void
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ia32_setregs(td, entry, stack, ps_strings)
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struct thread *td;
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u_long entry;
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u_long stack;
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u_long ps_strings;
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{
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struct trapframe *regs = td->td_frame;
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struct pcb *pcb = td->td_pcb;
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u_int64_t pc;
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register_t s;
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wrmsr(MSR_FSBASE, 0);
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wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */
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pcb->pcb_fsbase = 0;
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pcb->pcb_gsbase = 0;
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pcb->pcb_kgsbase = rdmsr(MSR_GSBASE);
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load_ds(_udatasel);
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load_es(_udatasel);
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load_fs(_udatasel);
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s = intr_disable();
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pc = rdmsr(MSR_GSBASE);
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load_gs(_udatasel); /* Clobbers kernel %GS.base */
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wrmsr(MSR_GSBASE, pc);
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intr_restore(s);
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pcb->pcb_ds = _udatasel;
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pcb->pcb_es = _udatasel;
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pcb->pcb_fs = _udatasel;
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pcb->pcb_gs = _udatasel;
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bzero((char *)regs, sizeof(struct trapframe));
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regs->tf_rip = entry;
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regs->tf_rsp = stack;
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regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
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regs->tf_ss = _udatasel;
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regs->tf_cs = _ucode32sel;
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regs->tf_rbx = ps_strings;
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/*
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* Arrange to trap the next npx or `fwait' instruction (see npx.c
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* for why fwait must be trapped at least if there is an npx or an
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* emulator). This is mainly to handle the case where npx0 is not
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* configured, since the npx routines normally set up the trap
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* otherwise. It should be done only at boot time, but doing it
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* here allows modifying `npx_exists' for testing the emulator on
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* systems with an npx.
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*/
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load_cr0(rcr0() | CR0_MP | CR0_TS);
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fpstate_drop(td);
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/* Return via doreti so that we can change to a different %cs */
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pcb->pcb_flags |= PCB_FULLCTX;
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td->td_retval[1] = 0;
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}
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