Nathan Whitehorn d929c32b7f Enter 64-bit mode as early as possible in the 64-bit PowerPC boot sequence. ... Most of the effect of setting MSR[SF] is that the CPU will stop ignoring the high 32 bits of registers containing addresses in load/store instructions. As such, the kernel was setting it only when it began to need access to high memory. MSR[SF] also affects the operation of some conditional instructions, however, and so setting it at late times could subtly break code at very early times. This fixes use of the FDT mode in loader, and FDT boot more generally, on 64-bit PowerPC systems. Hardware provided by: IBM LTC Approved by: re (kib)		2016-06-26 18:43:42 +00:00
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aim_machdep.c	Enter 64-bit mode as early as possible in the 64-bit PowerPC boot sequence.	2016-06-26 18:43:42 +00:00
locore32.S	Remove dead code and dead comments, most notably the implemenation of the	2016-01-10 18:00:01 +00:00
locore64.S	Enter 64-bit mode as early as possible in the 64-bit PowerPC boot sequence.	2016-06-26 18:43:42 +00:00
locore.S
mmu_oea64.c	sys: use our roundup2/rounddown2() macros when param.h is available.	2016-04-21 19:57:40 +00:00
mmu_oea64.h	New pmap implementation for 64-bit PowerPC processors. The main focus of	2015-02-24 21:37:20 +00:00
mmu_oea.c	sys: use our roundup2/rounddown2() macros when param.h is available.	2016-04-21 19:57:40 +00:00
moea64_if.m	New pmap implementation for 64-bit PowerPC processors. The main focus of	2015-02-24 21:37:20 +00:00
moea64_native.c	Make native page table access endian-safe. Even on CPUs running in	2015-11-17 16:09:26 +00:00
mp_cpudep.c	Fix booting of 32-bit kernels on 64-bit G5 hardware.	2016-01-02 22:04:37 +00:00
slb.c	As <machine/pmap.h> is included from <vm/pmap.h>, there is no need to	2016-02-22 09:02:20 +00:00
trap_subr32.S	Make 32-bit PowerPC kernels, like 64-bit PowerPC kernels, position-independent	2015-03-07 20:14:46 +00:00
trap_subr64.S	Remove dead code and dead comments, most notably the implemenation of the	2016-01-10 18:00:01 +00:00