7a7386a3e2
on UltraSPARC workstations. The driver is based on OpenBSD's SBus cs4231 driver and heavily modified to incorporate into sound(4) infrastructure. Due to the lack of APCDMA documentation, the DMA code of SBus cs4231 came from OpenBSD's driver. The driver runs without Giant lock and supports both SBus and EBus based CS4231 audio controller. Special thanks to marius for providing feedbacks during the driver writing. His feedback made it possible to write hiccup free playback code under high system loads. Approved by: jake (mentor) Reviewed by: marius (initial version) Tested by: marius, kwm, Julian C. Dunn(jdunn AT opentrend DOT net)
115 lines
4.0 KiB
C
115 lines
4.0 KiB
C
/* $FreeBSD$ */
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/* $OpenBSD: apcdmareg.h,v 1.2 2003/06/02 18:53:18 jason Exp $ */
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/*
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* Copyright (c) 2001 Jason L. Wright (jason@thought.net)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Definitions for Sun APC DMA controller.
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*/
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/* APC DMA registers */
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#define APC_CSR 0x0010 /* control/status */
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#define APC_CVA 0x0020 /* capture virtual address */
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#define APC_CC 0x0024 /* capture count */
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#define APC_CNVA 0x0028 /* capture next virtual address */
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#define APC_CNC 0x002c /* capture next count */
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#define APC_PVA 0x0030 /* playback virtual address */
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#define APC_PC 0x0034 /* playback count */
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#define APC_PNVA 0x0038 /* playback next virtual address */
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#define APC_PNC 0x003c /* playback next count */
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/*
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* APC DMA Register definitions
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*/
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#define APC_CSR_RESET 0x00000001 /* reset */
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#define APC_CSR_CDMA_GO 0x00000004 /* capture dma go */
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#define APC_CSR_PDMA_GO 0x00000008 /* playback dma go */
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#define APC_CSR_CODEC_RESET 0x00000020 /* codec reset */
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#define APC_CSR_CPAUSE 0x00000040 /* capture dma pause */
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#define APC_CSR_PPAUSE 0x00000080 /* playback dma pause */
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#define APC_CSR_CMIE 0x00000100 /* capture pipe empty enb */
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#define APC_CSR_CMI 0x00000200 /* capture pipe empty intr */
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#define APC_CSR_CD 0x00000400 /* capture nva dirty */
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#define APC_CSR_CM 0x00000800 /* capture data lost */
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#define APC_CSR_PMIE 0x00001000 /* pb pipe empty intr enable */
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#define APC_CSR_PD 0x00002000 /* pb nva dirty */
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#define APC_CSR_PM 0x00004000 /* pb pipe empty */
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#define APC_CSR_PMI 0x00008000 /* pb pipe empty interrupt */
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#define APC_CSR_EIE 0x00010000 /* error interrupt enable */
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#define APC_CSR_CIE 0x00020000 /* capture intr enable */
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#define APC_CSR_PIE 0x00040000 /* playback intr enable */
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#define APC_CSR_GIE 0x00080000 /* general intr enable */
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#define APC_CSR_EI 0x00100000 /* error interrupt */
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#define APC_CSR_CI 0x00200000 /* capture interrupt */
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#define APC_CSR_PI 0x00400000 /* playback interrupt */
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#define APC_CSR_GI 0x00800000 /* general interrupt */
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#define APC_CSR_PLAY ( \
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APC_CSR_EI | \
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APC_CSR_GIE | \
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APC_CSR_PIE | \
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APC_CSR_EIE | \
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APC_CSR_PDMA_GO | \
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APC_CSR_PMIE )
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#define APC_CSR_CAPTURE ( \
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APC_CSR_EI | \
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APC_CSR_GIE | \
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APC_CSR_CIE | \
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APC_CSR_EIE | \
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APC_CSR_CDMA_GO )
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#define APC_CSR_PLAY_PAUSE (~( \
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APC_CSR_PPAUSE | \
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APC_CSR_GI | \
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APC_CSR_PI | \
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APC_CSR_CI | \
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APC_CSR_EI | \
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APC_CSR_PMI | \
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APC_CSR_PMIE | \
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APC_CSR_CMI | \
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APC_CSR_CMIE ) )
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#define APC_CSR_CAPTURE_PAUSE (~( \
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APC_CSR_PPAUSE | \
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APC_CSR_GI | \
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APC_CSR_PI | \
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APC_CSR_CI | \
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APC_CSR_EI | \
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APC_CSR_PMI | \
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APC_CSR_PMIE | \
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APC_CSR_CMI | \
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APC_CSR_CMIE ) )
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#define APC_CSR_INTR_MASK ( \
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APC_CSR_GI | \
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APC_CSR_PI | \
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APC_CSR_CI | \
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APC_CSR_EI | \
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APC_CSR_PMI | \
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APC_CSR_CMI )
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