172 lines
5.4 KiB
C
172 lines
5.4 KiB
C
/*
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* Copyright (c) 2011 Adrian Chadd, Xenion Pty Ltd.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_ah.h"
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#include "ah.h"
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#include "ah_internal.h"
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#include "ah_eeprom_v14.h"
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#include "ah_eeprom_9287.h"
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#include "ar9002/ar9280.h"
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#include "ar5416/ar5416reg.h"
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#include "ar5416/ar5416phy.h"
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#include "ar9002/ar9002phy.h"
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#include "ar9002/ar9287phy.h"
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#include "ar9002/ar9287an.h"
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#include "ar9002/ar9287_olc.h"
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void
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ar9287olcInit(struct ath_hal *ah)
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{
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OS_REG_SET_BIT(ah, AR_PHY_TX_PWRCTRL9,
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AR_PHY_TX_PWRCTRL9_RES_DC_REMOVAL);
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OS_A_REG_RMW_FIELD(ah, AR9287_AN_TXPC0,
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AR9287_AN_TXPC0_TXPCMODE,
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AR9287_AN_TXPC0_TXPCMODE_TEMPSENSE);
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OS_DELAY(100);
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}
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/*
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* Run temperature compensation calibration.
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*
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* The TX gain table is adjusted depending upon the difference
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* between the initial PDADC value and the currently read
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* average TX power sample value. This value is only valid if
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* frames have been transmitted, so currPDADC will be 0 if
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* no frames have yet been transmitted.
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*/
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void
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ar9287olcTemperatureCompensation(struct ath_hal *ah)
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{
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uint32_t rddata;
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int32_t delta, currPDADC, slope;
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rddata = OS_REG_READ(ah, AR_PHY_TX_PWRCTRL4);
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currPDADC = MS(rddata, AR_PHY_TX_PWRCTRL_PD_AVG_OUT);
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HALDEBUG(ah, HAL_DEBUG_PERCAL, "%s: initPDADC=%d, currPDADC=%d\n",
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__func__, AH5416(ah)->initPDADC, currPDADC);
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if (AH5416(ah)->initPDADC == 0 || currPDADC == 0) {
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/*
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* Zero value indicates that no frames have been transmitted
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* yet, can't do temperature compensation until frames are
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* transmitted.
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*/
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return;
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} else {
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int8_t val;
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(void) (ath_hal_eepromGet(ah, AR_EEP_TEMPSENSE_SLOPE, &val));
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slope = val;
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if (slope == 0) { /* to avoid divide by zero case */
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delta = 0;
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} else {
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delta = ((currPDADC - AH5416(ah)->initPDADC)*4) / slope;
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}
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OS_REG_RMW_FIELD(ah, AR_PHY_CH0_TX_PWRCTRL11,
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AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP, delta);
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OS_REG_RMW_FIELD(ah, AR_PHY_CH1_TX_PWRCTRL11,
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AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP, delta);
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HALDEBUG(ah, HAL_DEBUG_PERCAL, "%s: delta=%d\n", __func__, delta);
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}
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}
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void
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ar9287olcGetTxGainIndex(struct ath_hal *ah,
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const struct ieee80211_channel *chan,
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struct cal_data_op_loop_ar9287 *pRawDatasetOpLoop,
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uint8_t *pCalChans, uint16_t availPiers, int8_t *pPwr)
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{
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uint16_t idxL = 0, idxR = 0, numPiers;
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HAL_BOOL match;
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CHAN_CENTERS centers;
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ar5416GetChannelCenters(ah, chan, ¢ers);
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for (numPiers = 0; numPiers < availPiers; numPiers++) {
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if (pCalChans[numPiers] == AR5416_BCHAN_UNUSED)
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break;
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}
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match = ath_ee_getLowerUpperIndex(
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(uint8_t)FREQ2FBIN(centers.synth_center, IEEE80211_IS_CHAN_2GHZ(chan)),
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pCalChans, numPiers, &idxL, &idxR);
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if (match) {
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*pPwr = (int8_t) pRawDatasetOpLoop[idxL].pwrPdg[0][0];
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} else {
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*pPwr = ((int8_t) pRawDatasetOpLoop[idxL].pwrPdg[0][0] +
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(int8_t) pRawDatasetOpLoop[idxR].pwrPdg[0][0])/2;
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}
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}
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void
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ar9287olcSetPDADCs(struct ath_hal *ah, int32_t txPower,
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uint16_t chain)
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{
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uint32_t tmpVal;
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uint32_t a;
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/* Enable OLPC for chain 0 */
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tmpVal = OS_REG_READ(ah, 0xa270);
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tmpVal = tmpVal & 0xFCFFFFFF;
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tmpVal = tmpVal | (0x3 << 24);
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OS_REG_WRITE(ah, 0xa270, tmpVal);
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/* Enable OLPC for chain 1 */
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tmpVal = OS_REG_READ(ah, 0xb270);
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tmpVal = tmpVal & 0xFCFFFFFF;
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tmpVal = tmpVal | (0x3 << 24);
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OS_REG_WRITE(ah, 0xb270, tmpVal);
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/* Write the OLPC ref power for chain 0 */
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if (chain == 0) {
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tmpVal = OS_REG_READ(ah, 0xa398);
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tmpVal = tmpVal & 0xff00ffff;
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a = (txPower)&0xff;
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tmpVal = tmpVal | (a << 16);
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OS_REG_WRITE(ah, 0xa398, tmpVal);
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}
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/* Write the OLPC ref power for chain 1 */
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if (chain == 1) {
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tmpVal = OS_REG_READ(ah, 0xb398);
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tmpVal = tmpVal & 0xff00ffff;
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a = (txPower)&0xff;
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tmpVal = tmpVal | (a << 16);
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OS_REG_WRITE(ah, 0xb398, tmpVal);
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}
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}
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