Ruslan Bukin d509eaf204 Account for bigger secondary data cache line size. ... Secondary data cache line size can be bigger than primary data cache line size, so use biggest value as a minimum alignment. Submitted by: kan Sponsored by: DARPA, AFRL		2016-11-19 16:36:38 +00:00
..
_align.h
_bus.h
_inttypes.h
_limits.h
_stdint.h
_types.h
asm.h	Rename some CPU_MIPSxxx options and add new CPU_MIPSxxx options	2016-02-02 07:47:38 +00:00
atomic.h	Add the atomic_thread_fence() family of functions with intent to	2015-07-08 18:12:24 +00:00
bootinfo.h
bus_dma.h
bus.h	Missing commit - remove MIPS fdt bus space.	2016-02-11 06:19:58 +00:00
cache_mipsNN.h	Add 64 byte linesize cache flushing routines for L1 instruction, L1 data	2015-03-26 14:51:24 +00:00
cache_r4k.h	Add 64 byte linesize cache flushing routines for L1 instruction, L1 data	2015-03-26 14:51:24 +00:00
cache.h	Account for bigger secondary data cache line size.	2016-11-19 16:36:38 +00:00
cdefs.h
clock.h	Garbage collect unused prototype for clockintr().	2016-05-20 15:34:03 +00:00
counter.h
cpu.h
cpufunc.h	Add Ingenic XBurst coprocessor 0 extra bits.	2016-11-19 15:38:13 +00:00
cpuinfo.h	[mips] add support for using the MIPS user register for TLS data.	2016-08-07 01:29:55 +00:00
cpuregs.h	Add Ingenic XBurst coprocessor 0 extra bits.	2016-11-19 15:38:13 +00:00
db_machdep.h
dump.h	Factor out duplicated code from dumpsys() on each architecture into generic	2015-01-07 01:01:39 +00:00
efi.h	Fix building on i386 and arm. But 'public domain' headers on the files	2016-10-13 06:56:23 +00:00
elf.h	Update ELF headers to include additional defines	2015-01-02 15:36:29 +00:00
endian.h
exec.h
fdt.h	Remove bus space fdt for MIPS.	2016-02-11 06:19:32 +00:00
float.h	Add full softfloat and hardfloat support for MIPS.	2016-10-31 15:33:58 +00:00
floatingpoint.h
fls64.h
fpu.h
frame.h
gdb_machdep.h
hwfunc.h	Allow the use of soft-interrupts for sending IPIs.	2016-09-08 17:37:13 +00:00
ieee.h
ieeefp.h
in_cksum.h	Rationalize BSD license on sys/*/include/in_cksum.h	2015-08-05 19:05:12 +00:00
intr_machdep.h	Increment the vm stats "v_intr" counter so the global system interrupt	2015-05-16 23:51:24 +00:00
intr.h	Fix MIPS INTRNG (both FDT and non-FDT) behaviour broken by r304459	2016-09-07 09:31:10 +00:00
kdb.h
limits.h
locore.h	Identify Ingenic CPUs.	2016-11-19 15:10:10 +00:00
md_var.h	Factor out duplicated code from dumpsys() on each architecture into generic	2015-01-07 01:01:39 +00:00
memdev.h
metadata.h
minidump.h
mips_opcode.h
octeon_cop2.h
ofw_machdep.h	Tidy up mips ofw_machdep.h. Don't include openfirm.h because openfirm.h	2015-12-20 19:09:12 +00:00
param.h	Subject: [PATCH] Pass MACHINE_ARCH on command line for MIPS kernels.	2016-11-18 16:23:31 +00:00
pcb.h
pcpu.h	Similarly to other architecture, add the include for cpufunc.h which is	2015-05-28 12:33:21 +00:00
pmap.h	Introduce a new mechanism for relocating virtual pages to a new physical	2015-12-19 18:42:50 +00:00
pmc_mdep.h
proc.h	The TLS offset is a property of the process ABI.	2016-09-15 17:25:52 +00:00
profile.h
pte.h	[mips] Add TLB pagemask probing code, and print out the allowable page sizes.	2015-12-22 15:59:41 +00:00
ptrace.h
reg.h	Move the 32-bit compatible procfs types from freebsd32.h to <sys/procfs.h>	2015-04-08 16:30:45 +00:00
regdef.h
regnum.h
reloc.h
resource.h	Define PCI_RES_BUS for MIPS.	2016-04-12 07:18:48 +00:00
runq.h
sc_machdep.h
setjmp.h
sf_buf.h	style(9)	2014-09-07 05:47:48 +00:00
sigframe.h
signal.h	Correct definition of 'struct sigcontext' on MIPS.	2016-10-26 17:37:08 +00:00
smp.h	Rename ARM_INTRNG and MIPS_INTRNG to INTRNG. This will help with machine	2016-04-15 16:05:41 +00:00
stdarg.h
sysarch.h
tlb.h
tls.h
trap.h
ucontext.h	POSIX states that #include <signal.h> shall make both mcontext_t and	2016-02-12 07:38:19 +00:00
varargs.h
vdso.h
vm.h
vmparam.h	Retire VM_FREEPOOL_CACHE as the next step in eliminating PG_CACHE pages.	2015-06-08 04:59:32 +00:00