9a8196ce19
kernel by PHYS_TO_DMAP() as previously present on amd64, arm64, riscv, and powerpc64. This introduces a new MI macro (PMAP_HAS_DMAP) that can be evaluated at runtime to determine if the architecture has a direct map; if it does not (or does) unconditionally and PMAP_HAS_DMAP is either 0 or 1, the compiler can remove the conditional logic. As part of this, implement PHYS_TO_DMAP() on sparc64 and mips64, which had similar things but spelled differently. 32-bit MIPS has a partial direct-map that maps poorly to this concept and is unchanged. Reviewed by: kib Suggestions from: marius, alc, kib Runtime tested on: amd64, powerpc64, powerpc, mips64
231 lines
7.3 KiB
C
231 lines
7.3 KiB
C
/*-
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* SPDX-License-Identifier: BSD-4-Clause
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*
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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* Copyright (c) 1994 John S. Dyson
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* All rights reserved.
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* Copyright (c) 2003 Peter Wemm
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)vmparam.h 5.9 (Berkeley) 5/12/91
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* $FreeBSD$
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*/
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#ifndef _MACHINE_VMPARAM_H_
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#define _MACHINE_VMPARAM_H_ 1
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/*
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* Machine dependent constants for AMD64.
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*/
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/*
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* Virtual memory related constants, all in bytes
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*/
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#define MAXTSIZ (32768UL*1024*1024) /* max text size */
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#ifndef DFLDSIZ
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#define DFLDSIZ (32768UL*1024*1024) /* initial data size limit */
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#endif
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#ifndef MAXDSIZ
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#define MAXDSIZ (32768UL*1024*1024) /* max data size */
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#endif
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#ifndef DFLSSIZ
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#define DFLSSIZ (8UL*1024*1024) /* initial stack size limit */
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#endif
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#ifndef MAXSSIZ
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#define MAXSSIZ (512UL*1024*1024) /* max stack size */
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#endif
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#ifndef SGROWSIZ
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#define SGROWSIZ (128UL*1024) /* amount to grow stack */
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#endif
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/*
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* We provide a machine specific single page allocator through the use
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* of the direct mapped segment. This uses 2MB pages for reduced
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* TLB pressure.
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*/
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#define UMA_MD_SMALL_ALLOC
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/*
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* The physical address space is densely populated.
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*/
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#define VM_PHYSSEG_DENSE
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/*
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* The number of PHYSSEG entries must be one greater than the number
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* of phys_avail entries because the phys_avail entry that spans the
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* largest physical address that is accessible by ISA DMA is split
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* into two PHYSSEG entries.
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*/
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#define VM_PHYSSEG_MAX 63
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/*
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* Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool
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* from which physical pages are allocated and VM_FREEPOOL_DIRECT is
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* the pool from which physical pages for page tables and small UMA
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* objects are allocated.
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*/
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#define VM_NFREEPOOL 2
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#define VM_FREEPOOL_DEFAULT 0
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#define VM_FREEPOOL_DIRECT 1
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/*
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* Create up to three free page lists: VM_FREELIST_DMA32 is for physical pages
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* that have physical addresses below 4G but are not accessible by ISA DMA,
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* and VM_FREELIST_ISADMA is for physical pages that are accessible by ISA
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* DMA.
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*/
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#define VM_NFREELIST 3
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#define VM_FREELIST_DEFAULT 0
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#define VM_FREELIST_DMA32 1
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#define VM_FREELIST_ISADMA 2
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/*
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* Create the DMA32 free list only if the number of physical pages above
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* physical address 4G is at least 16M, which amounts to 64GB of physical
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* memory.
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*/
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#define VM_DMA32_NPAGES_THRESHOLD 16777216
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/*
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* An allocation size of 16MB is supported in order to optimize the
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* use of the direct map by UMA. Specifically, a cache line contains
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* at most 8 PDEs, collectively mapping 16MB of physical memory. By
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* reducing the number of distinct 16MB "pages" that are used by UMA,
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* the physical memory allocator reduces the likelihood of both 2MB
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* page TLB misses and cache misses caused by 2MB page TLB misses.
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*/
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#define VM_NFREEORDER 13
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/*
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* Enable superpage reservations: 1 level.
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*/
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#ifndef VM_NRESERVLEVEL
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#define VM_NRESERVLEVEL 1
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#endif
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/*
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* Level 0 reservations consist of 512 pages.
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*/
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#ifndef VM_LEVEL_0_ORDER
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#define VM_LEVEL_0_ORDER 9
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#endif
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#ifdef SMP
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#define PA_LOCK_COUNT 256
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#endif
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/*
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* Virtual addresses of things. Derived from the page directory and
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* page table indexes from pmap.h for precision.
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*
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* 0x0000000000000000 - 0x00007fffffffffff user map
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* 0x0000800000000000 - 0xffff7fffffffffff does not exist (hole)
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* 0xffff800000000000 - 0xffff804020100fff recursive page table (512GB slot)
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* 0xffff804020101000 - 0xfffff7ffffffffff unused
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* 0xfffff80000000000 - 0xfffffbffffffffff 4TB direct map
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* 0xfffffc0000000000 - 0xfffffdffffffffff unused
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* 0xfffffe0000000000 - 0xffffffffffffffff 2TB kernel map
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*
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* Within the kernel map:
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*
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* 0xffffffff80000000 KERNBASE
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*/
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#define VM_MIN_KERNEL_ADDRESS KVADDR(KPML4BASE, 0, 0, 0)
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#define VM_MAX_KERNEL_ADDRESS KVADDR(KPML4BASE + NKPML4E - 1, \
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NPDPEPG-1, NPDEPG-1, NPTEPG-1)
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#define DMAP_MIN_ADDRESS KVADDR(DMPML4I, 0, 0, 0)
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#define DMAP_MAX_ADDRESS KVADDR(DMPML4I + NDMPML4E, 0, 0, 0)
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#define KERNBASE KVADDR(KPML4I, KPDPI, 0, 0)
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#define UPT_MAX_ADDRESS KVADDR(PML4PML4I, PML4PML4I, PML4PML4I, PML4PML4I)
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#define UPT_MIN_ADDRESS KVADDR(PML4PML4I, 0, 0, 0)
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#define VM_MAXUSER_ADDRESS UVADDR(NUPML4E, 0, 0, 0)
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#define SHAREDPAGE (VM_MAXUSER_ADDRESS - PAGE_SIZE)
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#define USRSTACK SHAREDPAGE
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#define VM_MAX_ADDRESS UPT_MAX_ADDRESS
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#define VM_MIN_ADDRESS (0)
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/*
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* XXX Allowing dmaplimit == 0 is a temporary workaround for vt(4) efifb's
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* early use of PHYS_TO_DMAP before the mapping is actually setup. This works
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* because the result is not actually accessed until later, but the early
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* vt fb startup needs to be reworked.
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*/
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#define PMAP_HAS_DMAP 1
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#define PHYS_TO_DMAP(x) ({ \
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KASSERT(dmaplimit == 0 || (x) < dmaplimit, \
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("physical address %#jx not covered by the DMAP", \
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(uintmax_t)x)); \
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(x) | DMAP_MIN_ADDRESS; })
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#define DMAP_TO_PHYS(x) ({ \
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KASSERT((x) < (DMAP_MIN_ADDRESS + dmaplimit) && \
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(x) >= DMAP_MIN_ADDRESS, \
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("virtual address %#jx not covered by the DMAP", \
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(uintmax_t)x)); \
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(x) & ~DMAP_MIN_ADDRESS; })
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/*
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* How many physical pages per kmem arena virtual page.
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*/
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#ifndef VM_KMEM_SIZE_SCALE
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#define VM_KMEM_SIZE_SCALE (1)
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#endif
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/*
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* Optional ceiling (in bytes) on the size of the kmem arena: 60% of the
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* kernel map.
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*/
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#ifndef VM_KMEM_SIZE_MAX
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#define VM_KMEM_SIZE_MAX ((VM_MAX_KERNEL_ADDRESS - \
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VM_MIN_KERNEL_ADDRESS + 1) * 3 / 5)
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#endif
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/* initial pagein size of beginning of executable file */
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#ifndef VM_INITIAL_PAGEIN
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#define VM_INITIAL_PAGEIN 16
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#endif
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#define ZERO_REGION_SIZE (2 * 1024 * 1024) /* 2MB */
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#endif /* _MACHINE_VMPARAM_H_ */
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