ba14258f32
- Fix RX and TX teardown: . TX teardown would not reclaim the abandoned descriptors; . Interrupt storms in RX teardown; . Fixed the acknowledge of the teardown completion interrupt. - Remove temporary lists for the descriptors; - Simplified the descriptor handling (less writes and reads from descriptors where possible); - Better debug; - Add support for the RX threshold interrupts: With interrupt moderation only, an RX overrun is likely to happen. The RX threshold is set to trigger a non paced interrupt everytime your RX free buffers are under the minimum threshold, helping to prevent the rx overrun. The NIC now survive when pushed over its limits (where previously it would lock up in a few seconds). uFW (600MHz SoC) can now forward up to 560Mb/s of UDP traffic (netmap pkt-gen as source and sink). TCP forwarding rate is over 350Mb/s. No difference (other than CPU use) was seen on Beaglebone black (1GHz SoC) for his fast ethernet. Tested on: uFW, BBB Sponsored by: Rubicon Communications, LLC (Netgate)
143 lines
4.0 KiB
C
143 lines
4.0 KiB
C
/*-
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* Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _IF_CPSWVAR_H
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#define _IF_CPSWVAR_H
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#define CPSW_PORTS 2
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#define CPSW_INTR_COUNT 4
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/* MII BUS */
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#define CPSW_MIIBUS_RETRIES 5
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#define CPSW_MIIBUS_DELAY 1000
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#define CPSW_MAX_ALE_ENTRIES 1024
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#define CPSW_SYSCTL_COUNT 34
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struct cpsw_slot {
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uint32_t bd_offset; /* Offset of corresponding BD within CPPI RAM. */
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bus_dmamap_t dmamap;
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struct ifnet *ifp;
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struct mbuf *mbuf;
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STAILQ_ENTRY(cpsw_slot) next;
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};
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STAILQ_HEAD(cpsw_slots, cpsw_slot);
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struct cpsw_queue {
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struct mtx lock;
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int running;
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int teardown;
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struct cpsw_slots active;
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struct cpsw_slots avail;
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uint32_t queue_adds; /* total bufs added */
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uint32_t queue_removes; /* total bufs removed */
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uint32_t queue_removes_at_last_tick; /* Used by watchdog */
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uint32_t queue_restart;
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int queue_slots;
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int active_queue_len;
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int max_active_queue_len;
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int avail_queue_len;
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int max_avail_queue_len;
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int longest_chain; /* Largest # segments in a single packet. */
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int hdp_offset;
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};
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struct cpsw_port {
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device_t dev;
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int phy;
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int vlan;
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};
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struct cpsw_softc {
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device_t dev;
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int active_slave;
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int debug;
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int dualemac;
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int rx_batch;
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phandle_t node;
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struct bintime attach_uptime; /* system uptime when attach happened. */
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struct cpsw_port port[2];
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unsigned coal_us;
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/* RX and TX buffer tracking */
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struct cpsw_queue rx, tx;
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/* We expect 1 memory resource and 4 interrupts from the device tree. */
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int mem_rid;
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struct resource *mem_res;
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struct resource *irq_res[CPSW_INTR_COUNT];
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void *ih_cookie[CPSW_INTR_COUNT];
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/* An mbuf full of nulls for TX padding. */
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bus_dmamap_t null_mbuf_dmamap;
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struct mbuf *null_mbuf;
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bus_addr_t null_mbuf_paddr;
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bus_dma_tag_t mbuf_dtag;
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struct {
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int resets;
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int timer;
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struct callout callout;
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} watchdog;
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/* 64-bit versions of 32-bit hardware statistics counters */
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uint64_t shadow_stats[CPSW_SYSCTL_COUNT];
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/* CPPI STATERAM has 512 slots for building TX/RX queues. */
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/* TODO: Size here supposedly varies with different versions
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of the controller. Check DaVinci specs and find a good
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way to adjust this. One option is to have a separate
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Device Tree parameter for number slots; another option
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is to calculate it from the memory size in the device tree. */
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struct cpsw_slot _slots[CPSW_CPPI_RAM_SIZE / sizeof(struct cpsw_cpdma_bd)];
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struct cpsw_slots avail;
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};
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struct cpswp_softc {
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device_t dev;
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device_t miibus;
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device_t pdev;
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int media_status;
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int unit;
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int vlan;
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struct bintime init_uptime; /* system uptime when init happened. */
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struct callout mii_callout;
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struct cpsw_softc *swsc;
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struct ifnet *ifp;
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struct mii_data *mii;
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struct mtx lock;
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uint32_t if_flags;
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uint32_t phy;
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uint32_t phyaccess;
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uint32_t physel;
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};
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#endif /*_IF_CPSWVAR_H */
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