78599c32ef
Follow-up to r353959 and r368070: do the same for other architectures. arm32 already seems to use its own .fnstart/.fnend directives, which appear to be ARM-specific variants of the same thing. Likewise, MIPS uses .frame directives. Reviewed by: arichardson Differential Revision: https://reviews.freebsd.org/D27387
100 lines
3.0 KiB
ArmAsm
100 lines
3.0 KiB
ArmAsm
/*-
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* Copyright (c) 2017-2018 QCM Technologies.
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* Copyright (c) 2017-2018 Semihalf.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "assym.inc"
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#include <machine/asm.h>
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.p2align 3
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ENTRY(enter_idle_powerx)
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mfsprg0 %r3 /* Get the pcpu pointer */
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ld %r3,PC_CURTHREAD(%r3) /* Get current thread */
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ld %r3,TD_PCB(%r3) /* Get PCB of current thread */
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std %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs. */
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std %r13,PCB_CONTEXT+1*8(%r3)
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std %r14,PCB_CONTEXT+2*8(%r3)
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std %r15,PCB_CONTEXT+3*8(%r3)
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std %r16,PCB_CONTEXT+4*8(%r3)
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std %r17,PCB_CONTEXT+5*8(%r3)
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std %r18,PCB_CONTEXT+6*8(%r3)
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std %r19,PCB_CONTEXT+7*8(%r3)
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std %r20,PCB_CONTEXT+8*8(%r3)
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std %r21,PCB_CONTEXT+9*8(%r3)
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std %r22,PCB_CONTEXT+10*8(%r3)
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std %r23,PCB_CONTEXT+11*8(%r3)
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std %r24,PCB_CONTEXT+12*8(%r3)
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std %r25,PCB_CONTEXT+13*8(%r3)
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std %r26,PCB_CONTEXT+14*8(%r3)
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std %r27,PCB_CONTEXT+15*8(%r3)
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std %r28,PCB_CONTEXT+16*8(%r3)
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std %r29,PCB_CONTEXT+17*8(%r3)
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std %r30,PCB_CONTEXT+18*8(%r3)
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std %r31,PCB_CONTEXT+19*8(%r3)
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mfcr %r16 /* Save the condition register */
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std %r16,PCB_CR(%r3)
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mflr %r16 /* Save the link register */
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std %r16,PCB_LR(%r3)
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std %r1,PCB_SP(%r3) /* Save the stack pointer */
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std %r2,PCB_TOC(%r3) /* Save the TOC pointer */
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bl 1f
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1: mflr %r3
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addi %r3,%r3,power_save_sequence-1b
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mtsrr0 %r3
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/* Set MSR */
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li %r3,0
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#ifdef __LITTLE_ENDIAN__
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ori %r3,%r3,(PSL_ME | PSL_RI | PSL_LE)
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#else
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ori %r3,%r3,(PSL_ME | PSL_RI)
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#endif
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li %r8,0x9 /* PSL_SF and PSL_HV */
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insrdi %r3,%r8,4,0
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mtsrr1 %r3
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rfid
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.p2align 2
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power_save_sequence:
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bl 1f
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.llong 0x0 /* Playground for power-save sequence */
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1: mflr %r3
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/* Start power-save sequence */
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std %r2,0(%r3)
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ptesync
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ld %r2,0(%r3)
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2: cmpd %r2,%r2
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bne 2b
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nap
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b .
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END(enter_idle_powerx)
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