e1020aef06
for TX transfer completion as for reasons unknown this occasionally causes SPI_SR_RXBUFF and SPI_SR_ENDRX to not rise. In any case, once the RX part of the transfer is done it's obvious that the preceding TX part had finished and checking of SPI_SR_TXEMPTY was introduced to rule out a possible cause for the data corruption mentioned in r236495 but which didn't turn out to be the problem anyway. MFC after: 3 days |
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arm | ||
at91 | ||
compile | ||
conf | ||
econa | ||
include | ||
mv | ||
s3c2xx0 | ||
sa11x0 | ||
xscale |