Marius Strobl bf38cf8ab3 - Unlike cache invalidation and TLB demapping IPIs, reading registers from ... other CPUs doesn't require locking so get rid of it. As the latter is used for the timecounter on certain machine models, using a spin lock in this case can lead to a deadlock with the upcoming callout(9) rework. - Merge r134227/r167250 from x86: Avoid cross-IPI SMP deadlock by using the smp_ipi_mtx spin lock not only for smp_rendezvous_cpus() but also for the MD cache invalidation and TLB demapping IPIs. - Mark some unused function arguments as such. MFC after: 1 week		2012-08-29 16:56:50 +00:00
..
central	s,KOBJMETHOD_END,DEVMETHOD_END,g in order to fully hide the explicit mention	2011-11-22 21:55:40 +00:00
compile
conf	Grammar fix: s/NIC's/NICs/	2012-08-26 01:21:02 +00:00
ebus	s,KOBJMETHOD_END,DEVMETHOD_END,g in order to fully hide the explicit mention	2011-11-22 21:55:40 +00:00
fhc	s,KOBJMETHOD_END,DEVMETHOD_END,g in order to fully hide the explicit mention	2011-11-22 21:55:40 +00:00
include	- Unlike cache invalidation and TLB demapping IPIs, reading registers from	2012-08-29 16:56:50 +00:00
isa	Retire isa_setup_intr() and isa_teardown_intr() and use the generic bus	2011-05-06 13:48:53 +00:00
pci	- Remove erroneous trailing semicolon. [1]	2012-03-30 15:08:09 +00:00
sbus	s,KOBJMETHOD_END,DEVMETHOD_END,g in order to fully hide the explicit mention	2011-11-22 21:55:40 +00:00
sparc64	- Unlike cache invalidation and TLB demapping IPIs, reading registers from	2012-08-29 16:56:50 +00:00