517 lines
14 KiB
C
517 lines
14 KiB
C
/*-
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* Copyright (c) 2005 Olivier Houchard. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <vm/pmap.h>
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#include <vm/vm_page.h>
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#include <vm/vm_extern.h>
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#define _ARM32_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <arm/at91/at91rm92reg.h>
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#include <arm/at91/at91var.h>
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static struct at91_softc *at91_softc;
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static int
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at91_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
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bus_space_handle_t *bshp)
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{
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vm_paddr_t pa, endpa;
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pa = trunc_page(bpa);
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if (pa >= 0xfff00000)
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return (0);
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endpa = round_page(bpa + size);
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*bshp = (vm_offset_t)pmap_mapdev(pa, endpa - pa);
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return (0);
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}
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static void
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at91_bs_unmap(void *t, bus_size_t size)
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{
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vm_offset_t va, endva;
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va = trunc_page((vm_offset_t)t);
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endva = va + round_page(size);
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/* Free the kernel virtual mapping. */
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kmem_free(kernel_map, va, endva - va);
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}
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static int
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at91_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
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bus_size_t size, bus_space_handle_t *nbshp)
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{
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*nbshp = bsh + offset;
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return (0);
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}
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bs_protos(generic);
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bs_protos(generic_armv4);
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struct bus_space at91_bs_tag = {
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/* cookie */
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(void *) 0,
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/* mapping/unmapping */
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at91_bs_map,
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at91_bs_unmap,
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at91_bs_subregion,
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/* allocation/deallocation */
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NULL,
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NULL,
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/* barrier */
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NULL,
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/* read (single) */
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generic_bs_r_1,
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generic_armv4_bs_r_2,
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generic_bs_r_4,
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NULL,
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/* read multiple */
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generic_bs_rm_1,
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generic_armv4_bs_rm_2,
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generic_bs_rm_4,
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NULL,
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/* read region */
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NULL,
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generic_armv4_bs_rr_2,
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generic_bs_rr_4,
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NULL,
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/* write (single) */
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generic_bs_w_1,
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generic_armv4_bs_w_2,
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generic_bs_w_4,
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NULL,
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/* write multiple */
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generic_bs_wm_1,
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generic_armv4_bs_wm_2,
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generic_bs_wm_4,
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NULL,
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/* write region */
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NULL,
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generic_armv4_bs_wr_2,
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generic_bs_wr_4,
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NULL,
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/* set multiple */
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NULL,
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NULL,
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NULL,
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NULL,
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/* set region */
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NULL,
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generic_armv4_bs_sr_2,
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generic_bs_sr_4,
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NULL,
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/* copy */
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NULL,
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generic_armv4_bs_c_2,
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NULL,
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NULL,
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};
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static int
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at91_probe(device_t dev)
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{
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device_set_desc(dev, "AT91RM9200 device bus");
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return (0);
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}
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static void
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at91_identify(driver_t *drv, device_t parent)
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{
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BUS_ADD_CHILD(parent, 0, "atmelarm", 0);
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}
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struct arm32_dma_range *
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bus_dma_get_range(void)
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{
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return (NULL);
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}
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int
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bus_dma_get_range_nb(void)
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{
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return (0);
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}
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extern void irq_entry(void);
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static void
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at91_add_child(device_t dev, int prio, const char *name, int unit,
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bus_addr_t addr, bus_size_t size, int irq)
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{
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device_t kid;
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struct at91_ivar *ivar;
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kid = device_add_child_ordered(dev, prio, name, unit);
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if (kid == NULL)
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return;
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ivar = malloc(sizeof(*ivar), M_DEVBUF, M_WAITOK | M_ZERO);
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if (ivar == NULL) {
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device_delete_child(dev, kid);
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return;
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}
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device_set_ivars(kid, ivar);
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resource_list_init(&ivar->resources);
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if (irq != -1)
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bus_set_resource(kid, SYS_RES_IRQ, 0, irq, 1);
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if (addr != 0)
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bus_set_resource(kid, SYS_RES_MEMORY, 0, addr, size);
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}
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static int
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at91_attach(device_t dev)
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{
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struct at91_softc *sc = device_get_softc(dev);
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int i;
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at91_softc = sc;
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sc->sc_st = &at91_bs_tag;
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sc->sc_sh = AT91RM92_BASE;
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sc->dev = dev;
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if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_SYS_BASE,
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AT91RM92_SYS_SIZE, &sc->sc_sys_sh) != 0)
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panic("Enable to map IRQ registers");
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sc->sc_irq_rman.rm_type = RMAN_ARRAY;
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sc->sc_irq_rman.rm_descr = "AT91RM92 IRQs";
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sc->sc_mem_rman.rm_type = RMAN_ARRAY;
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sc->sc_mem_rman.rm_descr = "AT91RM92 Memory";
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if (rman_init(&sc->sc_irq_rman) != 0 ||
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rman_manage_region(&sc->sc_irq_rman, 1, 31) != 0)
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panic("at91_attach: failed to set up IRQ rman");
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if (rman_init(&sc->sc_mem_rman) != 0 ||
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rman_manage_region(&sc->sc_mem_rman, 0xfff00000ul,
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0xfffffffful) != 0)
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panic("at91_attach: failed to set up memory rman");
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for (i = 0; i < 32; i++) {
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SVR +
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i * 4, i);
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/* Priority. */
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/* XXX: Give better priorities to IRQs */
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SMR + i * 4,
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0);
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if (i < 8)
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_EOICR,
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1);
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}
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SPU, 32);
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/* No debug. */
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_DCR, 0);
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/* Disable and clear all interrupts. */
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IDCR, 0xffffffff);
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_ICCR, 0xffffffff);
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/* XXX */
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/* Disable all interrupts for RTC (0xe24 == RTC_IDR) */
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xe24, 0xffffffff);
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/* Disable all interrupts for PMC (0xc64 == PMC_IDR) */
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xc64, 0xffffffff);
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/* Disable all interrupts for ST */
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xd18, 0xffffffff);
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/* DIsable all interrupts for DBGU */
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x20c, 0xffffffff);
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/* Disable all interrupts for PIOA */
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x444, 0xffffffff);
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/* Disable all interrupts for PIOB */
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x644, 0xffffffff);
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/* Disable all interrupts for PIOC */
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x844, 0xffffffff);
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/* Disable all interrupts for PIOD */
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xa44, 0xffffffff);
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/* Disable all interrupts for the SDRAM controller */
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xfa8, 0xffffffff);
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at91_add_child(dev, 0, "at91_st", 0, 0, 0, 1);
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at91_add_child(dev, 10, "at91_udp", 0, AT91RM92_BASE + // UDP
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AT91RM92_UDP_BASE, AT91RM92_UDP_SIZE, AT91RM92_IRQ_UDP);
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at91_add_child(dev, 10, "at91_mci", 0, AT91RM92_BASE + // MCI
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AT91RM92_MCI_BASE, AT91RM92_MCI_SIZE, AT91RM92_IRQ_MCI);
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at91_add_child(dev, 10, "at91_twi", 0, AT91RM92_BASE + // TWI
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AT91RM92_TWI_BASE, AT91RM92_TWI_SIZE, AT91RM92_IRQ_TWI);
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at91_add_child(dev, 10, "ate", 0, AT91RM92_BASE + // EMAC
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AT91RM92_EMAC_BASE, AT91RM92_EMAC_SIZE, AT91RM92_IRQ_EMAC);
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at91_add_child(dev, 10, "uart", 0, AT91RM92_BASE + // DBGU
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AT91RM92_SYS_BASE + DBGU, DBGU_SIZE, AT91RM92_IRQ_SYSTEM);
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at91_add_child(dev, 10, "uart", 1, AT91RM92_BASE + // USART0
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AT91RM92_USART0_BASE, AT91RM92_USART_SIZE, AT91RM92_IRQ_USART0);
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at91_add_child(dev, 10, "uart", 2, AT91RM92_BASE + // USART1
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AT91RM92_USART1_BASE, AT91RM92_USART_SIZE, AT91RM92_IRQ_USART1);
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at91_add_child(dev, 10, "uart", 3, AT91RM92_BASE + // USART2
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AT91RM92_USART2_BASE, AT91RM92_USART_SIZE, AT91RM92_IRQ_USART2);
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at91_add_child(dev, 10, "uart", 4, AT91RM92_BASE + // USART3
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AT91RM92_USART3_BASE, AT91RM92_USART_SIZE, AT91RM92_IRQ_USART3);
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at91_add_child(dev, 10, "at91_ssc", 0, AT91RM92_BASE + // SSC0
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AT91RM92_SSC0_BASE, AT91RM92_SSC_SIZE, AT91RM92_IRQ_SSC0);
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at91_add_child(dev, 10, "at91_ssc", 1, AT91RM92_BASE + // SSC1
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AT91RM92_SSC1_BASE, AT91RM92_SSC_SIZE, AT91RM92_IRQ_SSC1);
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at91_add_child(dev, 10, "at91_ssc", 2, AT91RM92_BASE + // SSC2
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AT91RM92_SSC2_BASE, AT91RM92_SSC_SIZE, AT91RM92_IRQ_SSC2);
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at91_add_child(dev, 10, "at91_spi", 0, AT91RM92_BASE + // SPI
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AT91RM92_SPI_BASE, AT91RM92_SPI_SIZE, AT91RM92_IRQ_SPI);
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// Not sure that the following belongs on this bus.
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at91_add_child(dev, 10, "ohci", 0, // UHP
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AT91RM92_OHCI_BASE, AT91RM92_OHCI_SIZE, AT91RM92_IRQ_UHP);
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bus_generic_probe(dev);
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bus_generic_attach(dev);
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enable_interrupts(I32_bit | F32_bit);
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return (0);
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}
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static struct resource *
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at91_alloc_resource(device_t dev, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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struct at91_softc *sc = device_get_softc(dev);
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struct resource_list_entry *rle;
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struct at91_ivar *ivar = device_get_ivars(child);
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struct resource_list *rl = &ivar->resources;
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if (device_get_parent(child) != dev)
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return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
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type, rid, start, end, count, flags));
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rle = resource_list_find(rl, type, *rid);
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if (rle == NULL)
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return (NULL);
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if (rle->res)
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panic("Resource rid %d type %d already in use", *rid, type);
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if (start == 0UL && end == ~0UL) {
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start = rle->start;
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count = ulmax(count, rle->count);
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end = ulmax(rle->end, start + count - 1);
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}
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switch (type)
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{
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case SYS_RES_IRQ:
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rle->res = rman_reserve_resource(&sc->sc_irq_rman,
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start, end, count, flags, child);
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break;
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case SYS_RES_MEMORY:
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rle->res = rman_reserve_resource(&sc->sc_mem_rman,
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start, end, count, flags, child);
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rman_set_bustag(rle->res, &at91_bs_tag);
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rman_set_bushandle(rle->res, start);
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break;
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}
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if (rle->res) {
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rle->start = rman_get_start(rle->res);
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rle->end = rman_get_end(rle->res);
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rle->count = count;
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}
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return (rle->res);
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}
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static struct resource_list *
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at91_get_resource_list(device_t dev, device_t child)
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{
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struct at91_ivar *ivar;
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ivar = device_get_ivars(child);
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return (&(ivar->resources));
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}
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static int
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at91_release_resource(device_t dev, device_t child, int type,
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int rid, struct resource *r)
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{
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struct resource_list *rl;
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struct resource_list_entry *rle;
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rl = at91_get_resource_list(dev, child);
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if (rl == NULL)
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return (EINVAL);
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rle = resource_list_find(rl, type, rid);
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if (rle == NULL)
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return (EINVAL);
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rman_release_resource(r);
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rle->res = NULL;
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return (0);
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}
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static int
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at91_setup_intr(device_t dev, device_t child,
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struct resource *ires, int flags, driver_intr_t *intr, void *arg,
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void **cookiep)
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{
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struct at91_softc *sc = device_get_softc(dev);
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BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, intr, arg,
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cookiep);
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IECR,
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1 << rman_get_start(ires));
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return (0);
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}
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static int
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at91_teardown_intr(device_t dev, device_t child, struct resource *res,
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void *cookie)
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{
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struct at91_softc *sc = device_get_softc(dev);
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bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IDCR,
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1 << rman_get_start(res));
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return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie));
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}
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static int
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at91_activate_resource(device_t bus, device_t child, int type, int rid,
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struct resource *r)
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{
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#if 0
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u_long p;
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int error;
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if (type == SYS_RES_MEMORY) {
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error = bus_space_map(rman_get_bustag(r),
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rman_get_bushandle(r), rman_get_size(r), 0, &p);
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if (error)
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return (error);
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rman_set_bushandle(r, p);
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}
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#endif
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return (rman_activate_resource(r));
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}
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static int
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at91_print_child(device_t dev, device_t child)
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{
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struct at91_ivar *ivars;
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struct resource_list *rl;
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int retval = 0;
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ivars = device_get_ivars(child);
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rl = &ivars->resources;
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retval += bus_print_child_header(dev, child);
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retval += resource_list_print_type(rl, "port", SYS_RES_IOPORT, "%#lx");
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retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx");
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retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld");
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if (device_get_flags(dev))
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retval += printf(" flags %#x", device_get_flags(dev));
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retval += bus_print_child_footer(dev, child);
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return (retval);
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}
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void
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arm_mask_irq(uintptr_t nb)
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{
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bus_space_write_4(at91_softc->sc_st,
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at91_softc->sc_sys_sh, IC_IDCR, 1 << nb);
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}
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int
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arm_get_next_irq()
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{
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int status;
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int irq;
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irq = bus_space_read_4(at91_softc->sc_st,
|
|
at91_softc->sc_sys_sh, IC_IVR);
|
|
status = bus_space_read_4(at91_softc->sc_st,
|
|
at91_softc->sc_sys_sh, IC_ISR);
|
|
if (status == 0) {
|
|
bus_space_write_4(at91_softc->sc_st,
|
|
at91_softc->sc_sys_sh, IC_EOICR, 1);
|
|
return (-1);
|
|
}
|
|
return (irq);
|
|
}
|
|
|
|
void
|
|
arm_unmask_irq(uintptr_t nb)
|
|
{
|
|
|
|
bus_space_write_4(at91_softc->sc_st,
|
|
at91_softc->sc_sys_sh, IC_IECR, 1 << nb);
|
|
bus_space_write_4(at91_softc->sc_st, at91_softc->sc_sys_sh,
|
|
IC_EOICR, 0);
|
|
|
|
}
|
|
|
|
static device_method_t at91_methods[] = {
|
|
DEVMETHOD(device_probe, at91_probe),
|
|
DEVMETHOD(device_attach, at91_attach),
|
|
DEVMETHOD(device_identify, at91_identify),
|
|
|
|
DEVMETHOD(bus_alloc_resource, at91_alloc_resource),
|
|
DEVMETHOD(bus_setup_intr, at91_setup_intr),
|
|
DEVMETHOD(bus_teardown_intr, at91_teardown_intr),
|
|
DEVMETHOD(bus_activate_resource, at91_activate_resource),
|
|
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
|
|
DEVMETHOD(bus_get_resource_list,at91_get_resource_list),
|
|
DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
|
|
DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
|
|
DEVMETHOD(bus_release_resource, at91_release_resource),
|
|
DEVMETHOD(bus_print_child, at91_print_child),
|
|
|
|
{0, 0},
|
|
};
|
|
|
|
static driver_t at91_driver = {
|
|
"atmelarm",
|
|
at91_methods,
|
|
sizeof(struct at91_softc),
|
|
};
|
|
static devclass_t at91_devclass;
|
|
|
|
DRIVER_MODULE(atmelarm, nexus, at91_driver, at91_devclass, 0, 0);
|