718cf2ccb9
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
202 lines
5.4 KiB
C
202 lines
5.4 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2008 Joseph Koshy
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _DEV_HWPMC_CORE_H_
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#define _DEV_HWPMC_CORE_H_ 1
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#define IA32_PERF_CAPABILITIES 0x345
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#define PERFCAP_LBR_FORMAT 0x003f
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#define PERFCAP_PEBS_TRAP 0x0040
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#define PERFCAP_PEBS_SAVEARCH 0x0080
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#define PERFCAP_PEBS_RECFORMAT 0x0f00
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#define PERFCAP_SMM_FREEZE 0x1000
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#define PERFCAP_FW_WRITE 0x2000 /* full width write aliases */
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/*
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* Fixed-function PMCs.
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*/
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struct pmc_md_iaf_op_pmcallocate {
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uint16_t pm_iaf_flags; /* additional flags */
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};
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#define IAF_OS 0x1
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#define IAF_USR 0x2
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#define IAF_ANY 0x4
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#define IAF_PMI 0x8
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/*
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* Programmable PMCs.
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*/
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struct pmc_md_iap_op_pmcallocate {
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uint32_t pm_iap_config;
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uint64_t pm_iap_rsp;
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};
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#define IAP_EVSEL(C) ((C) & 0xFF)
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#define IAP_UMASK(C) ((C) & 0xFF00)
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#define IAP_USR (1 << 16)
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#define IAP_OS (1 << 17)
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#define IAP_EDGE (1 << 18)
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#define IAP_INT (1 << 20)
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#define IAP_ANY (1 << 21)
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#define IAP_EN (1 << 22)
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#define IAP_INV (1 << 23)
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#define IAP_CMASK(C) (((C) & 0xFF) << 24)
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#define IA_OFFCORE_RSP_MASK_I7WM 0x000000F7FF
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#define IA_OFFCORE_RSP_MASK_SBIB 0x3F807F8FFF
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#ifdef _KERNEL
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/*
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* Fixed-function counters.
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*/
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#define IAF_MASK 0xF
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#define IAF_COUNTER_MASK 0x0000ffffffffffff
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#define IAF_CTR0 0x309
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#define IAF_CTR1 0x30A
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#define IAF_CTR2 0x30B
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/*
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* The IAF_CTRL MSR is laid out in the following way.
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*
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* Bit Position Use
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* 63 - 12 Reserved (do not touch)
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* 11 Ctr 2 PMI
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* 10 Reserved (do not touch)
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* 9-8 Ctr 2 Enable
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* 7 Ctr 1 PMI
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* 6 Reserved (do not touch)
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* 5-4 Ctr 1 Enable
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* 3 Ctr 0 PMI
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* 2 Reserved (do not touch)
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* 1-0 Ctr 0 Enable (3: All Levels, 2: User, 1: OS, 0: Disable)
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*/
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#define IAF_OFFSET 32
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#define IAF_CTRL 0x38D
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#define IAF_CTRL_MASK 0x0000000000000bbb
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/*
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* Programmable counters.
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*/
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#define IAP_PMC0 0x0C1
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#define IAP_A_PMC0 0x4C1
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/*
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* IAP_EVSEL(n) is laid out in the following way.
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*
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* Bit Position Use
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* 63-31 Reserved (do not touch)
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* 31-24 Counter Mask
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* 23 Invert
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* 22 Enable
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* 21 Reserved (do not touch)
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* 20 APIC Interrupt Enable
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* 19 Pin Control
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* 18 Edge Detect
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* 17 OS
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* 16 User
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* 15-8 Unit Mask
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* 7-0 Event Select
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*/
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#define IAP_EVSEL_MASK 0x00000000ffdfffff
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#define IAP_EVSEL0 0x186
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/*
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* Simplified programming interface in Intel Performance Architecture
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* v2 and later.
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*/
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#define IA_GLOBAL_STATUS 0x38E
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#define IA_GLOBAL_CTRL 0x38F
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/*
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* IA_GLOBAL_CTRL is laid out in the following way.
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*
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* Bit Position Use
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* 63-35 Reserved (do not touch)
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* 34 IAF Counter 2 Enable
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* 33 IAF Counter 1 Enable
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* 32 IAF Counter 0 Enable
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* 31-0 Depends on programmable counters
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*/
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/* The mask is only for the fixed porttion of the register. */
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#define IAF_GLOBAL_CTRL_MASK 0x0000000700000000
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/* The mask is only for the programmable porttion of the register. */
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#define IAP_GLOBAL_CTRL_MASK 0x00000000ffffffff
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/* The mask is for both the fixed and programmable porttions of the register. */
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#define IA_GLOBAL_CTRL_MASK 0x00000007ffffffff
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#define IA_GLOBAL_OVF_CTRL 0x390
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#define IA_GLOBAL_STATUS_FLAG_CONDCHG (1ULL << 63)
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#define IA_GLOBAL_STATUS_FLAG_OVFBUF (1ULL << 62)
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/*
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* Offcore response configuration.
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*/
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#define IA_OFFCORE_RSP0 0x1A6
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#define IA_OFFCORE_RSP1 0x1A7
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struct pmc_md_iaf_pmc {
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uint64_t pm_iaf_ctrl;
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};
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struct pmc_md_iap_pmc {
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uint32_t pm_iap_evsel;
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uint64_t pm_iap_rsp;
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};
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/*
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* Prototypes.
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*/
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int pmc_core_initialize(struct pmc_mdep *_md, int _maxcpu,
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int _version_override);
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void pmc_core_finalize(struct pmc_mdep *_md);
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int pmc_iaf_initialize(struct pmc_mdep *_md, int _maxcpu, int _npmc, int _width);
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void pmc_iaf_finalize(struct pmc_mdep *_md);
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int pmc_iap_initialize(struct pmc_mdep *_md, int _maxcpu, int _npmc, int _width,
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int _flags);
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void pmc_iap_finalize(struct pmc_mdep *_md);
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#endif /* _KERNEL */
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#endif /* _DEV_HWPMC_CORE_H */
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