b8b068386a
not recognized by ciphy(4) due to the incorrect OUI. Reported by: nork Tested by: nork
436 lines
11 KiB
C
436 lines
11 KiB
C
/*-
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* Copyright (c) 2004
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* Bill Paul <wpaul@windriver.com>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bill Paul.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Driver for the Cicada/Vitesse CS/VSC8xxx 10/100/1000 copper PHY.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/socket.h>
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#include <sys/bus.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include "miidevs.h"
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#include <dev/mii/ciphyreg.h>
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#include "miibus_if.h"
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#include <machine/bus.h>
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/*
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#include <dev/vge/if_vgereg.h>
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*/
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static int ciphy_probe(device_t);
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static int ciphy_attach(device_t);
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static device_method_t ciphy_methods[] = {
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/* device interface */
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DEVMETHOD(device_probe, ciphy_probe),
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DEVMETHOD(device_attach, ciphy_attach),
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DEVMETHOD(device_detach, mii_phy_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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{ 0, 0 }
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};
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static devclass_t ciphy_devclass;
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static driver_t ciphy_driver = {
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"ciphy",
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ciphy_methods,
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sizeof(struct mii_softc)
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};
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DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0);
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static int ciphy_service(struct mii_softc *, struct mii_data *, int);
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static void ciphy_status(struct mii_softc *);
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static void ciphy_reset(struct mii_softc *);
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static void ciphy_fixup(struct mii_softc *);
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static const struct mii_phydesc ciphys[] = {
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MII_PHY_DESC(CICADA, CS8201),
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MII_PHY_DESC(CICADA, CS8201A),
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MII_PHY_DESC(CICADA, CS8201B),
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MII_PHY_DESC(CICADA, CS8204),
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MII_PHY_DESC(CICADA, VSC8211),
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MII_PHY_DESC(CICADA, CS8244),
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MII_PHY_DESC(VITESSE, VSC8601),
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MII_PHY_END
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};
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static int
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ciphy_probe(device_t dev)
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{
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return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT));
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}
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static int
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ciphy_attach(device_t dev)
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{
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struct mii_softc *sc;
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struct mii_attach_args *ma;
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struct mii_data *mii;
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sc = device_get_softc(dev);
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ma = device_get_ivars(dev);
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sc->mii_dev = device_get_parent(dev);
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mii = device_get_softc(sc->mii_dev);
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LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
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sc->mii_inst = mii->mii_instance;
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sc->mii_phy = ma->mii_phyno;
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sc->mii_service = ciphy_service;
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sc->mii_pdata = mii;
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sc->mii_flags |= MIIF_NOISOLATE;
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mii->mii_instance++;
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ciphy_reset(sc);
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sc->mii_capabilities =
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PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
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if (sc->mii_capabilities & BMSR_EXTSTAT)
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sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
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device_printf(dev, " ");
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mii_phy_add_media(sc);
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printf("\n");
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MIIBUS_MEDIAINIT(sc->mii_dev);
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return (0);
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}
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static int
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ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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int reg, speed, gig;
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switch (cmd) {
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case MII_POLLSTAT:
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/*
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* If we're not polling our PHY instance, just return.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return (0);
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break;
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case MII_MEDIACHG:
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/*
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* If the media indicates a different PHY instance,
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* isolate ourselves.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
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reg = PHY_READ(sc, MII_BMCR);
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PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
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return (0);
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}
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/*
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* If the interface is not up, don't do anything.
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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break;
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ciphy_fixup(sc); /* XXX hardware bug work-around */
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switch (IFM_SUBTYPE(ife->ifm_media)) {
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case IFM_AUTO:
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#ifdef foo
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/*
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* If we're already in auto mode, just return.
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*/
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if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN)
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return (0);
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#endif
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(void) mii_phy_auto(sc);
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break;
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case IFM_1000_T:
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speed = CIPHY_S1000;
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goto setit;
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case IFM_100_TX:
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speed = CIPHY_S100;
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goto setit;
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case IFM_10_T:
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speed = CIPHY_S10;
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setit:
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if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
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speed |= CIPHY_BMCR_FDX;
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gig = CIPHY_1000CTL_AFD;
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} else {
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gig = CIPHY_1000CTL_AHD;
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}
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PHY_WRITE(sc, CIPHY_MII_1000CTL, 0);
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PHY_WRITE(sc, CIPHY_MII_BMCR, speed);
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PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE);
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if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
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break;
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PHY_WRITE(sc, CIPHY_MII_1000CTL, gig);
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PHY_WRITE(sc, CIPHY_MII_BMCR,
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speed|CIPHY_BMCR_AUTOEN|CIPHY_BMCR_STARTNEG);
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/*
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* When setting the link manually, one side must
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* be the master and the other the slave. However
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* ifmedia doesn't give us a good way to specify
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* this, so we fake it by using one of the LINK
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* flags. If LINK0 is set, we program the PHY to
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* be a master, otherwise it's a slave.
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*/
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if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
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PHY_WRITE(sc, CIPHY_MII_1000CTL,
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gig|CIPHY_1000CTL_MSE|CIPHY_1000CTL_MSC);
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} else {
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PHY_WRITE(sc, CIPHY_MII_1000CTL,
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gig|CIPHY_1000CTL_MSE);
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}
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break;
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case IFM_NONE:
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PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
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break;
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case IFM_100_T4:
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default:
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return (EINVAL);
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}
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break;
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case MII_TICK:
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/*
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* If we're not currently selected, just return.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return (0);
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/*
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* Is the interface even up?
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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return (0);
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/*
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* Only used for autonegotiation.
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*/
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if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
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break;
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/*
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* Check to see if we have link. If we do, we don't
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* need to restart the autonegotiation process. Read
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* the BMSR twice in case it's latched.
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*/
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reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
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if (reg & BMSR_LINK)
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break;
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/* Announce link loss right after it happens. */
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if (++sc->mii_ticks == 0)
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break;
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/*
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* Only retry autonegotiation every mii_anegticks seconds.
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*/
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if (sc->mii_ticks <= sc->mii_anegticks)
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break;
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sc->mii_ticks = 0;
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mii_phy_auto(sc);
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break;
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}
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/* Update the media status. */
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ciphy_status(sc);
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/*
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* Callback if something changed. Note that we need to poke
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* apply fixups for certain PHY revs.
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*/
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if (sc->mii_media_active != mii->mii_media_active ||
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sc->mii_media_status != mii->mii_media_status ||
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cmd == MII_MEDIACHG) {
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ciphy_fixup(sc);
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}
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mii_phy_update(sc, cmd);
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return (0);
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}
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static void
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ciphy_status(struct mii_softc *sc)
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{
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struct mii_data *mii = sc->mii_pdata;
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int bmsr, bmcr;
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mii->mii_media_status = IFM_AVALID;
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mii->mii_media_active = IFM_ETHER;
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bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
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if (bmsr & BMSR_LINK)
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mii->mii_media_status |= IFM_ACTIVE;
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bmcr = PHY_READ(sc, CIPHY_MII_BMCR);
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if (bmcr & CIPHY_BMCR_LOOP)
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mii->mii_media_active |= IFM_LOOP;
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if (bmcr & CIPHY_BMCR_AUTOEN) {
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if ((bmsr & CIPHY_BMSR_ACOMP) == 0) {
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/* Erg, still trying, I guess... */
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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}
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bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR);
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switch (bmsr & CIPHY_AUXCSR_SPEED) {
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case CIPHY_SPEED10:
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mii->mii_media_active |= IFM_10_T;
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break;
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case CIPHY_SPEED100:
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mii->mii_media_active |= IFM_100_TX;
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break;
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case CIPHY_SPEED1000:
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mii->mii_media_active |= IFM_1000_T;
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break;
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default:
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device_printf(sc->mii_dev, "unknown PHY speed %x\n",
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bmsr & CIPHY_AUXCSR_SPEED);
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break;
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}
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if (bmsr & CIPHY_AUXCSR_FDX)
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mii->mii_media_active |= IFM_FDX;
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else
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mii->mii_media_active |= IFM_HDX;
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}
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static void
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ciphy_reset(struct mii_softc *sc)
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{
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mii_phy_reset(sc);
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DELAY(1000);
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}
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#define PHY_SETBIT(x, y, z) \
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PHY_WRITE(x, y, (PHY_READ(x, y) | (z)))
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#define PHY_CLRBIT(x, y, z) \
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PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))
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static void
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ciphy_fixup(struct mii_softc *sc)
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{
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uint16_t model;
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uint16_t status, speed;
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uint16_t val;
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model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2));
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status = PHY_READ(sc, CIPHY_MII_AUXCSR);
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speed = status & CIPHY_AUXCSR_SPEED;
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if (strcmp(device_get_name(device_get_parent(sc->mii_dev)),
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"nfe") == 0) {
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/* need to set for 2.5V RGMII for NVIDIA adapters */
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val = PHY_READ(sc, CIPHY_MII_ECTL1);
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val &= ~(CIPHY_ECTL1_IOVOL | CIPHY_ECTL1_INTSEL);
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val |= (CIPHY_IOVOL_2500MV | CIPHY_INTSEL_RGMII);
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PHY_WRITE(sc, CIPHY_MII_ECTL1, val);
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/* From Linux. */
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val = PHY_READ(sc, CIPHY_MII_AUXCSR);
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val |= CIPHY_AUXCSR_MDPPS;
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PHY_WRITE(sc, CIPHY_MII_AUXCSR, val);
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val = PHY_READ(sc, CIPHY_MII_10BTCSR);
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val |= CIPHY_10BTCSR_ECHO;
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PHY_WRITE(sc, CIPHY_MII_10BTCSR, val);
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}
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switch (model) {
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case MII_MODEL_CICADA_CS8204:
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case MII_MODEL_CICADA_CS8201:
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/* Turn off "aux mode" (whatever that means) */
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PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
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/*
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* Work around speed polling bug in VT3119/VT3216
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* when using MII in full duplex mode.
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*/
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if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
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(status & CIPHY_AUXCSR_FDX)) {
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PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
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} else {
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PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
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}
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/* Enable link/activity LED blink. */
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PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
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break;
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case MII_MODEL_CICADA_CS8201A:
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case MII_MODEL_CICADA_CS8201B:
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/*
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* Work around speed polling bug in VT3119/VT3216
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* when using MII in full duplex mode.
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*/
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if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
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(status & CIPHY_AUXCSR_FDX)) {
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PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
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} else {
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PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
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}
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break;
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case MII_MODEL_CICADA_VSC8211:
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case MII_MODEL_CICADA_CS8244:
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case MII_MODEL_VITESSE_VSC8601:
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break;
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default:
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device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n",
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model);
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break;
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}
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}
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