332 lines
8.7 KiB
C
332 lines
8.7 KiB
C
/*-
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* Copyright (c) 2011
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* Ben Gray <ben.r.gray@gmail.com>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <machine/bus.h>
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#include <machine/fdt.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include <machine/frame.h>
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#include <machine/resource.h>
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#include <machine/intr.h>
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#include <arm/ti/tivar.h>
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#include <arm/ti/ti_cpuid.h>
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#include <arm/ti/omap4/omap4_reg.h>
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#include <arm/ti/omap3/omap3_reg.h>
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#include <arm/ti/am335x/am335x_reg.h>
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#define OMAP4_STD_FUSE_DIE_ID_0 0x2200
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#define OMAP4_ID_CODE 0x2204
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#define OMAP4_STD_FUSE_DIE_ID_1 0x2208
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#define OMAP4_STD_FUSE_DIE_ID_2 0x220C
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#define OMAP4_STD_FUSE_DIE_ID_3 0x2210
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#define OMAP4_STD_FUSE_PROD_ID_0 0x2214
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#define OMAP4_STD_FUSE_PROD_ID_1 0x2218
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#define OMAP3_ID_CODE 0xA204
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static uint32_t chip_revision = 0xffffffff;
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/**
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* ti_revision - Returns the revision number of the device
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*
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* Simply returns an identifier for the revision of the chip we are running
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* on.
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*
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* RETURNS
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* A 32-bit identifier for the current chip
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*/
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uint32_t
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ti_revision(void)
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{
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return chip_revision;
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}
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/**
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* omap4_get_revision - determines omap4 revision
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*
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* Reads the registers to determine the revision of the chip we are currently
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* running on. Stores the information in global variables.
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*
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*
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*/
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static void
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omap4_get_revision(void)
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{
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uint32_t id_code;
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uint32_t revision;
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uint32_t hawkeye;
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bus_space_handle_t bsh;
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/* The chip revsion is read from the device identification registers and
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* the JTAG (?) tap registers, which are located in address 0x4A00_2200 to
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* 0x4A00_2218. This is part of the L4_CORE memory range and should have
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* been mapped in by the machdep.c code.
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*
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* STD_FUSE_DIE_ID_0 0x4A00 2200
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* ID_CODE 0x4A00 2204 (this is the only one we need)
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* STD_FUSE_DIE_ID_1 0x4A00 2208
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* STD_FUSE_DIE_ID_2 0x4A00 220C
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* STD_FUSE_DIE_ID_3 0x4A00 2210
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* STD_FUSE_PROD_ID_0 0x4A00 2214
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* STD_FUSE_PROD_ID_1 0x4A00 2218
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*/
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/* FIXME Should we map somewhere else? */
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bus_space_map(fdtbus_bs_tag,OMAP44XX_L4_CORE_HWBASE, 0x4000, 0, &bsh);
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id_code = bus_space_read_4(fdtbus_bs_tag, bsh, OMAP4_ID_CODE);
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bus_space_unmap(fdtbus_bs_tag, bsh, 0x4000);
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hawkeye = ((id_code >> 12) & 0xffff);
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revision = ((id_code >> 28) & 0xf);
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/* Apparently according to the linux code there were some ES2.0 samples that
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* have the wrong id code and report themselves as ES1.0 silicon. So used
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* the ARM cpuid to get the correct revision.
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*/
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if (revision == 0) {
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id_code = cpufunc_id();
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revision = (id_code & 0xf) - 1;
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}
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switch (hawkeye) {
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case 0xB852:
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switch (revision) {
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case 0:
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chip_revision = OMAP4430_REV_ES1_0;
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break;
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case 1:
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chip_revision = OMAP4430_REV_ES2_1;
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break;
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default:
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chip_revision = OMAP4430_REV_UNKNOWN;
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break;
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}
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break;
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case 0xB95C:
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switch (revision) {
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case 3:
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chip_revision = OMAP4430_REV_ES2_1;
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break;
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case 4:
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chip_revision = OMAP4430_REV_ES2_2;
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break;
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case 6:
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chip_revision = OMAP4430_REV_ES2_3;
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break;
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default:
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chip_revision = OMAP4430_REV_UNKNOWN;
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break;
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}
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break;
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case 0xB94E:
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switch (revision) {
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case 0:
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chip_revision = OMAP4460_REV_ES1_0;
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break;
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case 2:
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chip_revision = OMAP4460_REV_ES1_1;
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break;
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default:
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chip_revision = OMAP4460_REV_UNKNOWN;
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break;
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}
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break;
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case 0xB975:
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switch (revision) {
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case 0:
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chip_revision = OMAP4470_REV_ES1_0;
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break;
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default:
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chip_revision = OMAP4470_REV_UNKNOWN;
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break;
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}
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break;
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default:
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/* Default to the latest revision if we can't determine type */
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chip_revision = OMAP_UNKNOWN_DEV;
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break;
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}
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if (chip_revision != OMAP_UNKNOWN_DEV) {
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printf("Texas Instruments OMAP%04x Processor, Revision ES%u.%u\n",
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OMAP_REV_DEVICE(chip_revision), OMAP_REV_MAJOR(chip_revision),
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OMAP_REV_MINOR(chip_revision));
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}
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else {
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printf("Texas Instruments unknown OMAP chip: %04x, rev %d\n",
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hawkeye, revision);
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}
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}
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/**
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* omap3_get_revision - determines omap3 revision
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*
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* Reads the registers to determine the revision of the chip we are currently
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* running on. Stores the information in global variables.
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*
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* WARNING: This function currently only really works for OMAP3530 devices.
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*
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*
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*
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*/
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static void
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omap3_get_revision(void)
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{
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uint32_t id_code;
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uint32_t revision;
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uint32_t hawkeye;
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bus_space_handle_t bsh;
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/* The chip revsion is read from the device identification registers and
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* the JTAG (?) tap registers, which are located in address 0x4A00_2200 to
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* 0x4A00_2218. This is part of the L4_CORE memory range and should have
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* been mapped in by the machdep.c code.
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*
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* CONTROL_IDCODE 0x4830 A204 (this is the only one we need)
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*
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*
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*/
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bus_space_map(fdtbus_bs_tag, OMAP35XX_L4_WAKEUP_HWBASE, 0x10000, 0, &bsh);
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id_code = bus_space_read_4(fdtbus_bs_tag, bsh, OMAP3_ID_CODE);
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bus_space_unmap(fdtbus_bs_tag, bsh, 0x10000);
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hawkeye = ((id_code >> 12) & 0xffff);
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revision = ((id_code >> 28) & 0xf);
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switch (hawkeye) {
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case 0xB6D6:
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chip_revision = OMAP3350_REV_ES1_0;
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break;
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case 0xB7AE:
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if (revision == 1)
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chip_revision = OMAP3530_REV_ES2_0;
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else if (revision == 2)
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chip_revision = OMAP3530_REV_ES2_1;
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else if (revision == 3)
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chip_revision = OMAP3530_REV_ES3_0;
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else if (revision == 4)
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chip_revision = OMAP3530_REV_ES3_1;
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else if (revision == 7)
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chip_revision = OMAP3530_REV_ES3_1_2;
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break;
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default:
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/* Default to the latest revision if we can't determine type */
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chip_revision = OMAP3530_REV_ES3_1_2;
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break;
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}
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printf("Texas Instruments OMAP%04x Processor, Revision ES%u.%u\n",
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OMAP_REV_DEVICE(chip_revision), OMAP_REV_MAJOR(chip_revision),
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OMAP_REV_MINOR(chip_revision));
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}
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static void
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am335x_get_revision(void)
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{
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uint32_t dev_feature;
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uint8_t cpu_last_char;
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bus_space_handle_t bsh;
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bus_space_map(fdtbus_bs_tag, AM335X_CONTROL_BASE, AM335X_CONTROL_SIZE, 0, &bsh);
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chip_revision = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEVICE_ID);
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dev_feature = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEV_FEATURE);
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bus_space_unmap(fdtbus_bs_tag, bsh, AM335X_CONTROL_SIZE);
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switch (dev_feature) {
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case 0x00FF0382:
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cpu_last_char='2';
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break;
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case 0x20FF0382:
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cpu_last_char='4';
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break;
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case 0x00FF0383:
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cpu_last_char='6';
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break;
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case 0x00FE0383:
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cpu_last_char='7';
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break;
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case 0x20FF0383:
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cpu_last_char='8';
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break;
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case 0x20FE0383:
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cpu_last_char='9';
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break;
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default:
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cpu_last_char='x';
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}
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printf("Texas Instruments AM335%c Processor, Revision ES1.%u\n",
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cpu_last_char, AM335X_DEVREV(chip_revision));
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}
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/**
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* ti_cpu_ident - attempts to identify the chip we are running on
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* @dummy: ignored
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*
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* This function is called before any of the driver are initialised, however
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* the basic virt to phys maps have been setup in machdep.c so we can still
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* access the required registers, we just have to use direct register reads
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* and writes rather than going through the bus stuff.
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*
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*
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*/
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static void
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ti_cpu_ident(void *dummy)
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{
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switch(ti_chip()) {
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case CHIP_OMAP_3:
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omap3_get_revision();
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break;
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case CHIP_OMAP_4:
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omap4_get_revision();
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break;
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case CHIP_AM335X:
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am335x_get_revision();
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break;
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default:
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panic("Unknown chip type, fixme!\n");
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}
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}
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SYSINIT(ti_cpu_ident, SI_SUB_CPU, SI_ORDER_SECOND, ti_cpu_ident, NULL);
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