freebsd-dev/sys/dev/dpaa2/dpaa2_mac.h
Dmitry Salychev ba7319e909
Add initial DPAA2 support
DPAA2 is a hardware-level networking architecture found in some NXP
SoCs which contain hardware blocks including Management Complex
(MC, a command interface to manipulate DPAA2 objects), Wire Rate I/O
processor (WRIOP, packets distribution, queuing, drop decisions),
Queues and Buffers Manager (QBMan, Rx/Tx queues control, Rx buffer
pools) and the others.

The Management Complex runs NXP-supplied firmware which provides DPAA2
objects as an abstraction layer over those blocks to simplify an
access to the underlying hardware. Each DPAA2 object has its own
driver (to perform an initialization at least) and will be visible
as a separate device in the device tree.

Two new drivers (dpaa2_mc and dpaa2_rc) act like firmware buses in
order to form a hierarchy of the DPAA2 devices:

	acpiX (or simplebusX)
	  dpaa2_mcX
	    dpaa2_rcX
	      dpaa2_mcp0
	      ...
	      dpaa2_mcpN
	      dpaa2_bpX
	      dpaa2_macX
	      dpaa2_io0
	      ...
	      dpaa2_ioM
	      dpaa2_niX

dpaa2_mc is suppossed to be a root of the hierarchy, comes in ACPI
and FDT flavours and implements helper interfaces to allocate and
assign bus resources, MSI and "managed" DPAA2 devices (NXP treats some
of the objects as resources for the other DPAA2 objects to let them
function properly). Almost all of the DPAA2 objects are assigned to
the resource containers (dpaa2_rc) to implement isolation.

The initial implementation focuses on the DPAA2 network interface
to be operational. It is the most complex object in terms of
dependencies which uses I/O objects to transmit/receive packets.

Approved by:		bz (mentor)
Tested by:		manu, bz
MFC after:		3 months
Differential Revision:	https://reviews.freebsd.org/D36638
2022-10-14 22:49:09 +02:00

125 lines
3.6 KiB
C

/*-
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright © 2021-2022 Dmitry Salychev
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef _DPAA2_MAC_H
#define _DPAA2_MAC_H
#include <sys/rman.h>
#include <sys/bus.h>
#include <sys/queue.h>
#include <net/ethernet.h>
#include "dpaa2_types.h"
#include "dpaa2_mcp.h"
#define DPAA2_MAC_MAX_RESOURCES 1 /* Maximum resources per DPMAC: 1 DPMCP. */
#define DPAA2_MAC_MSI_COUNT 1 /* MSIs per DPMAC */
/* DPMAC link configuration options. */
#define DPAA2_MAC_LINK_OPT_AUTONEG ((uint64_t) 0x01u)
#define DPAA2_MAC_LINK_OPT_HALF_DUPLEX ((uint64_t) 0x02u)
#define DPAA2_MAC_LINK_OPT_PAUSE ((uint64_t) 0x04u)
#define DPAA2_MAC_LINK_OPT_ASYM_PAUSE ((uint64_t) 0x08u)
enum dpaa2_mac_eth_if {
DPAA2_MAC_ETH_IF_MII,
DPAA2_MAC_ETH_IF_RMII,
DPAA2_MAC_ETH_IF_SMII,
DPAA2_MAC_ETH_IF_GMII,
DPAA2_MAC_ETH_IF_RGMII,
DPAA2_MAC_ETH_IF_SGMII,
DPAA2_MAC_ETH_IF_QSGMII,
DPAA2_MAC_ETH_IF_XAUI,
DPAA2_MAC_ETH_IF_XFI,
DPAA2_MAC_ETH_IF_CAUI,
DPAA2_MAC_ETH_IF_1000BASEX,
DPAA2_MAC_ETH_IF_USXGMII
};
enum dpaa2_mac_link_type {
DPAA2_MAC_LINK_TYPE_NONE,
DPAA2_MAC_LINK_TYPE_FIXED,
DPAA2_MAC_LINK_TYPE_PHY,
DPAA2_MAC_LINK_TYPE_BACKPLANE
};
/**
* @brief Attributes of the DPMAC object.
*
* id: DPMAC object ID.
* max_rate: Maximum supported rate (in Mbps).
* eth_if: Type of the Ethernet interface.
* link_type: Type of the link.
*/
struct dpaa2_mac_attr {
uint32_t id;
uint32_t max_rate;
enum dpaa2_mac_eth_if eth_if;
enum dpaa2_mac_link_type link_type;
};
/**
* @brief Link state of the DPMAC object.
*/
struct dpaa2_mac_link_state {
uint64_t options;
uint64_t supported;
uint64_t advert;
uint32_t rate;
bool up;
bool state_valid;
};
/**
* @brief Software context for the DPAA2 MAC driver.
*
* dev: Device associated with this software context.
* addr: Physical address assigned to the DPMAC object.
* attr: Attributes of the DPMAC object.
*/
struct dpaa2_mac_softc {
device_t dev;
uint8_t addr[ETHER_ADDR_LEN];
struct resource *res[DPAA2_MAC_MAX_RESOURCES];
struct dpaa2_mac_attr attr;
/* Help to send commands to MC. */
struct dpaa2_cmd *cmd;
uint16_t rc_token;
uint16_t mac_token;
/* Interrupts. */
int irq_rid[DPAA2_MAC_MSI_COUNT];
struct resource *irq_res;
void *intr; /* interrupt handle */
};
extern struct resource_spec dpaa2_mac_spec[];
#endif /* _DPAA2_MAC_H */