718cf2ccb9
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
380 lines
8.9 KiB
C
380 lines
8.9 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2013-2014 Qlogic Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* File: qls_def.h
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* Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
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*/
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#ifndef _QLS_DEF_H_
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#define _QLS_DEF_H_
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/*
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* structure encapsulating a DMA buffer
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*/
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struct qla_dma {
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bus_size_t alignment;
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uint32_t size;
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void *dma_b;
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bus_addr_t dma_addr;
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bus_dmamap_t dma_map;
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bus_dma_tag_t dma_tag;
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};
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typedef struct qla_dma qla_dma_t;
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/*
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* structure encapsulating interrupt vectors
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*/
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struct qla_ivec {
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uint32_t cq_idx;
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void *ha;
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struct resource *irq;
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void *handle;
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int irq_rid;
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};
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typedef struct qla_ivec qla_ivec_t;
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/*
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* Transmit Related Definitions
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*/
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#define MAX_TX_RINGS 1
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#define NUM_TX_DESCRIPTORS 1024
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#define QLA_MAX_SEGMENTS 64 /* maximum # of segs in a sg list */
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#define QLA_OAL_BLK_SIZE (sizeof (q81_txb_desc_t) * QLA_MAX_SEGMENTS)
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#define QLA_TX_OALB_TOTAL_SIZE (NUM_TX_DESCRIPTORS * QLA_OAL_BLK_SIZE)
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#define QLA_TX_PRIVATE_BSIZE ((QLA_TX_OALB_TOTAL_SIZE + \
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PAGE_SIZE + \
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(PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1))
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#define QLA_MAX_MTU 9000
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#define QLA_STD_FRAME_SIZE 1514
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#define QLA_MAX_TSO_FRAME_SIZE ((64 * 1024 - 1) + 22)
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#define QL_FRAME_HDR_SIZE (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN +\
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sizeof (struct ip6_hdr) + sizeof (struct tcphdr) + 16)
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struct qla_tx_buf {
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struct mbuf *m_head;
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bus_dmamap_t map;
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/* The number of entries in the OAL is determined by QLA_MAX_SEGMENTS */
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bus_addr_t oal_paddr;
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void *oal_vaddr;
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};
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typedef struct qla_tx_buf qla_tx_buf_t;
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struct qla_tx_ring {
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volatile struct {
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uint32_t wq_dma:1,
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privb_dma:1;
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} flags;
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qla_dma_t privb_dma;
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qla_dma_t wq_dma;
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qla_tx_buf_t tx_buf[NUM_TX_DESCRIPTORS];
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uint64_t count;
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struct resource *wq_db_addr;
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uint32_t wq_db_offset;
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q81_tx_cmd_t *wq_vaddr;
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bus_addr_t wq_paddr;
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void *wq_icb_vaddr;
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bus_addr_t wq_icb_paddr;
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uint32_t *txr_cons_vaddr;
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bus_addr_t txr_cons_paddr;
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volatile uint32_t txr_free; /* # of free entries in tx ring */
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volatile uint32_t txr_next; /* # next available tx ring entry */
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volatile uint32_t txr_done;
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uint64_t tx_frames;
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uint64_t tx_tso_frames;
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uint64_t tx_vlan_frames;
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};
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typedef struct qla_tx_ring qla_tx_ring_t;
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/*
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* Receive Related Definitions
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*/
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#define MAX_RX_RINGS MAX_TX_RINGS
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#define NUM_RX_DESCRIPTORS 1024
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#define NUM_CQ_ENTRIES NUM_RX_DESCRIPTORS
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#define QLA_LGB_SIZE (12 * 1024)
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#define QLA_NUM_LGB_ENTRIES 32
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#define QLA_LBQ_SIZE (QLA_NUM_LGB_ENTRIES * sizeof(q81_bq_addr_e_t))
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#define QLA_LGBQ_AND_TABLE_SIZE \
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((QLA_LBQ_SIZE + PAGE_SIZE + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1))
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/* Please note that Small Buffer size is determined by max mtu size */
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#define QLA_NUM_SMB_ENTRIES NUM_RX_DESCRIPTORS
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#define QLA_SBQ_SIZE (QLA_NUM_SMB_ENTRIES * sizeof(q81_bq_addr_e_t))
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#define QLA_SMBQ_AND_TABLE_SIZE \
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((QLA_SBQ_SIZE + PAGE_SIZE + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1))
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struct qla_rx_buf {
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struct mbuf *m_head;
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bus_dmamap_t map;
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bus_addr_t paddr;
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void *next;
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};
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typedef struct qla_rx_buf qla_rx_buf_t;
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struct qla_rx_ring {
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volatile struct {
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uint32_t cq_dma:1,
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lbq_dma:1,
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sbq_dma:1,
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lb_dma:1;
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} flags;
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qla_dma_t cq_dma;
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qla_dma_t lbq_dma;
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qla_dma_t sbq_dma;
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qla_dma_t lb_dma;
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struct lro_ctrl lro;
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qla_rx_buf_t rx_buf[NUM_RX_DESCRIPTORS];
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qla_rx_buf_t *rxb_free;
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uint32_t rx_free;
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uint32_t rx_next;
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uint32_t cq_db_offset;
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void *cq_icb_vaddr;
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bus_addr_t cq_icb_paddr;
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uint32_t *cqi_vaddr;
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bus_addr_t cqi_paddr;
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void *cq_base_vaddr;
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bus_addr_t cq_base_paddr;
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uint32_t cq_next; /* next cq entry to process */
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void *lbq_addr_tbl_vaddr;
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bus_addr_t lbq_addr_tbl_paddr;
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void *lbq_vaddr;
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bus_addr_t lbq_paddr;
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uint32_t lbq_next; /* next entry in LBQ to process */
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uint32_t lbq_free;/* # of entries in LBQ to arm */
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uint32_t lbq_in; /* next entry in LBQ to arm */
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void *lb_vaddr;
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bus_addr_t lb_paddr;
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void *sbq_addr_tbl_vaddr;
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bus_addr_t sbq_addr_tbl_paddr;
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void *sbq_vaddr;
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bus_addr_t sbq_paddr;
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uint32_t sbq_next; /* next entry in SBQ to process */
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uint32_t sbq_free;/* # of entries in SBQ to arm */
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uint32_t sbq_in; /* next entry in SBQ to arm */
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uint64_t rx_int;
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uint64_t rss_int;
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};
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typedef struct qla_rx_ring qla_rx_ring_t;
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#define QLA_WATCHDOG_CALLOUT_TICKS 1
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/*
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* Multicast Definitions
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*/
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typedef struct _qla_mcast {
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uint16_t rsrvd;
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uint8_t addr[6];
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} __packed qla_mcast_t;
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/*
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* Misc. definitions
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*/
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#define QLA_PAGE_SIZE 4096
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/*
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* Adapter structure contains the hardware independent information of the
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* pci function.
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*/
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struct qla_host {
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volatile struct {
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volatile uint32_t
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mpi_dma :1,
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rss_dma :1,
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intr_enable :1,
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qla_callout_init :1,
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qla_watchdog_active :1,
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qla_watchdog_exit :1,
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qla_watchdog_pause :1,
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lro_init :1,
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parent_tag :1,
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lock_init :1;
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} flags;
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volatile uint32_t hw_init;
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volatile uint32_t qla_watchdog_exited;
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volatile uint32_t qla_watchdog_paused;
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volatile uint32_t qla_initiate_recovery;
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device_t pci_dev;
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uint8_t pci_func;
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uint16_t watchdog_ticks;
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uint8_t resvd;
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/* ioctl related */
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struct cdev *ioctl_dev;
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/* register mapping */
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struct resource *pci_reg;
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int reg_rid;
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struct resource *pci_reg1;
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int reg_rid1;
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int msix_count;
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qla_ivec_t irq_vec[MAX_RX_RINGS];
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/* parent dma tag */
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bus_dma_tag_t parent_tag;
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/* interface to o.s */
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struct ifnet *ifp;
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struct ifmedia media;
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uint16_t max_frame_size;
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uint16_t rsrvd0;
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uint32_t msize;
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int if_flags;
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/* hardware access lock */
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struct mtx hw_lock;
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volatile uint32_t hw_lock_held;
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uint32_t vm_pgsize;
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/* transmit related */
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uint32_t num_tx_rings;
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qla_tx_ring_t tx_ring[MAX_TX_RINGS];
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bus_dma_tag_t tx_tag;
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struct task tx_task;
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struct taskqueue *tx_tq;
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struct callout tx_callout;
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struct mtx tx_lock;
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/* receive related */
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uint32_t num_rx_rings;
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qla_rx_ring_t rx_ring[MAX_RX_RINGS];
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bus_dma_tag_t rx_tag;
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/* stats */
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uint32_t err_m_getcl;
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uint32_t err_m_getjcl;
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uint32_t err_tx_dmamap_create;
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uint32_t err_tx_dmamap_load;
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uint32_t err_tx_defrag;
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/* mac address related */
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uint8_t mac_rcv_mode;
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uint8_t mac_addr[ETHER_ADDR_LEN];
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uint32_t nmcast;
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qla_mcast_t mcast[Q8_MAX_NUM_MULTICAST_ADDRS];
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/* Link Related */
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uint8_t link_up;
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uint32_t link_status;
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uint32_t link_down_info;
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uint32_t link_hw_info;
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uint32_t link_dcbx_counters;
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uint32_t link_change_counters;
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/* Flash Related */
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q81_flash_t flash;
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/* debug stuff */
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volatile const char *qla_lock;
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volatile const char *qla_unlock;
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/* Error Recovery Related */
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uint32_t err_inject;
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struct task err_task;
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struct taskqueue *err_tq;
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/* Chip related */
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uint32_t rev_id;
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/* mailbox completions */
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uint32_t aen[Q81_NUM_AEN_REGISTERS];
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uint32_t mbox[Q81_NUM_MBX_REGISTERS];
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volatile uint32_t mbx_done;
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/* mpi dump related */
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qla_dma_t mpi_dma;
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qla_dma_t rss_dma;
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};
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typedef struct qla_host qla_host_t;
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/* note that align has to be a power of 2 */
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#define QL_ALIGN(size, align) (((size) + ((align) - 1)) & (~((align) - 1)))
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#define QL_MIN(x, y) ((x < y) ? x : y)
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#define QL_RUNNING(ifp) \
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((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) == \
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IFF_DRV_RUNNING)
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/* Return 0, if identical, else 1 */
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#define QL_MAC_CMP(mac1, mac2) \
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((((*(uint32_t *) mac1) == (*(uint32_t *) mac2) && \
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(*(uint16_t *)(mac1 + 4)) == (*(uint16_t *)(mac2 + 4)))) ? 0 : 1)
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#endif /* #ifndef _QLS_DEF_H_ */
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