a157e42516
The main goal of this is to generate timer interrupts only when there is some work to do. When CPU is busy interrupts are generating at full rate of hz + stathz to fullfill scheduler and timekeeping requirements. But when CPU is idle, only minimum set of interrupts (down to 8 interrupts per second per CPU now), needed to handle scheduled callouts is executed. This allows significantly increase idle CPU sleep time, increasing effect of static power-saving technologies. Also it should reduce host CPU load on virtualized systems, when guest system is idle. There is set of tunables, also available as writable sysctls, allowing to control wanted event timer subsystem behavior: kern.eventtimer.timer - allows to choose event timer hardware to use. On x86 there is up to 4 different kinds of timers. Depending on whether chosen timer is per-CPU, behavior of other options slightly differs. kern.eventtimer.periodic - allows to choose periodic and one-shot operation mode. In periodic mode, current timer hardware taken as the only source of time for time events. This mode is quite alike to previous kernel behavior. One-shot mode instead uses currently selected time counter hardware to schedule all needed events one by one and program timer to generate interrupt exactly in specified time. Default value depends of chosen timer capabilities, but one-shot mode is preferred, until other is forced by user or hardware. kern.eventtimer.singlemul - in periodic mode specifies how much times higher timer frequency should be, to not strictly alias hardclock() and statclock() events. Default values are 2 and 4, but could be reduced to 1 if extra interrupts are unwanted. kern.eventtimer.idletick - makes each CPU to receive every timer interrupt independently of whether they busy or not. By default this options is disabled. If chosen timer is per-CPU and runs in periodic mode, this option has no effect - all interrupts are generating. As soon as this patch modifies cpu_idle() on some platforms, I have also refactored one on x86. Now it makes use of MONITOR/MWAIT instrunctions (if supported) under high sleep/wakeup rate, as fast alternative to other methods. It allows SMP scheduler to wake up sleeping CPUs much faster without using IPI, significantly increasing performance on some highly task-switching loads. Tested by: many (on i386, amd64, sparc64 and powerc) H/W donated by: Gheorghe Ardelean Sponsored by: iXsystems, Inc.
108 lines
3.2 KiB
C
108 lines
3.2 KiB
C
/*-
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* Copyright (c) 2001 Jake Burkholder.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_INTR_MACHDEP_H_
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#define _MACHINE_INTR_MACHDEP_H_
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#define IRSR_BUSY (1 << 5)
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#define PIL_MAX (1 << 4)
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#define IV_MAX (1 << 11)
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#define IR_FREE (PIL_MAX * 2)
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#define IH_SHIFT PTR_SHIFT
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#define IQE_SHIFT 5
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#define IV_SHIFT 5
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#define PIL_LOW 1 /* stray interrupts */
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#define PIL_ITHREAD 2 /* interrupts that use ithreads */
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#define PIL_RENDEZVOUS 3 /* smp rendezvous ipi */
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#define PIL_AST 4 /* ast ipi */
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#define PIL_STOP 5 /* stop cpu ipi */
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#define PIL_PREEMPT 6 /* preempt idle thread cpu ipi */
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#define PIL_HARDCLOCK 7 /* hardclock broadcast */
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#define PIL_FAST 13 /* fast interrupts */
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#define PIL_TICK 14
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#ifndef LOCORE
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struct trapframe;
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typedef void ih_func_t(struct trapframe *);
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typedef void iv_func_t(void *);
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struct ithd;
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struct intr_request {
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struct intr_request *ir_next;
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iv_func_t *ir_func;
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void *ir_arg;
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u_int ir_vec;
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u_int ir_pri;
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};
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struct intr_vector {
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iv_func_t *iv_func;
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void *iv_arg;
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struct intr_event *iv_event;
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u_int iv_pri;
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u_int iv_vec;
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};
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extern ih_func_t *intr_handlers[];
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extern struct intr_vector intr_vectors[];
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void intr_setup(int level, ih_func_t *ihf, int pri, iv_func_t *ivf,
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void *iva);
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int inthand_add(const char *name, int vec, int (*filt)(void *),
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void (*handler)(void *), void *arg, int flags, void **cookiep);
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int inthand_remove(int vec, void *cookie);
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void cpu_intrq_init(void);
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ih_func_t intr_fast;
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#define CPU_LIST_SIZE (MAXCPU * sizeof(uint16_t))
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#define INTR_CPU_Q_SIZE (cpu_q_entries * INTR_REPORT_SIZE)
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#define INTR_DEV_Q_SIZE (dev_q_entries * INTR_REPORT_SIZE)
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#endif /* !LOCORE */
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#define INTR_REPORT_SIZE 64
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#define CPU_RQ_ENTRIES 64
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#define CPU_NRQ_ENTRIES 64
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#define Q_ENTRY_SIZE 64
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#define CPU_RQ_SIZE (CPU_RQ_ENTRIES * Q_ENTRY_SIZE)
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#define CPU_NRQ_SIZE (CPU_NRQ_ENTRIES * Q_ENTRY_SIZE)
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#endif /* !_MACHINE_INTR_MACHDEP_H_ */
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