freebsd-dev/sys/amd64/vmm
Neel Natu ea91ca92ba Do a proper emulation of guest writes to MSR_EFER.
- Must-Be-Zero bits cannot be set.
- EFER_LME and EFER_LMA should respect the long mode consistency checks.
- EFER_NXE, EFER_FFXSR, EFER_TCE can be set if allowed by CPUID capabilities.
- Flag an error if guest tries to set EFER_LMSLE since bhyve doesn't enforce
  segment limits in 64-bit mode.

MFC after:	2 weeks
2015-05-06 05:40:20 +00:00
..
amd Do a proper emulation of guest writes to MSR_EFER. 2015-05-06 05:40:20 +00:00
intel Emulate machine check related MSRs to allow guest OSes like Windows to boot. 2015-05-02 04:19:11 +00:00
io r281630 relaxed the limits on the vectors that can be asserted in the IRRs. 2015-05-01 16:00:29 +00:00
vmm_dev.c Fix "MOVS" instruction memory to MMIO emulation. Currently updates to 2015-04-01 00:15:31 +00:00
vmm_host.c - Rework the XSAVE/XRSTOR emulation to only expose XCR0 features to the 2014-05-27 19:04:38 +00:00
vmm_host.h
vmm_instruction_emul.c Emulate the 'CMP r/m8, imm8' instruction encountered when booting a Windows 2015-05-04 04:27:23 +00:00
vmm_ioport.c Don't require <sys/cpuset.h> to be always included before <machine/vmm.h>. 2015-04-30 22:23:22 +00:00
vmm_ioport.h Change the type of the first argument to the I/O emulation handlers to 2014-10-26 19:03:06 +00:00
vmm_ktr.h Add emulation of the "outsb" instruction. NetBSD guests use this to write to 2014-05-23 05:15:17 +00:00
vmm_lapic.c Relax the check on which vectors can be delivered through the APIC. According 2015-04-16 22:44:51 +00:00
vmm_lapic.h
vmm_mem.c
vmm_mem.h
vmm_stat.c Don't require <sys/cpuset.h> to be always included before <machine/vmm.h>. 2015-04-30 22:23:22 +00:00
vmm_stat.h Get rid of unused stat VMM_HLT_IGNORED. 2014-09-21 18:52:56 +00:00
vmm_util.c
vmm_util.h
vmm.c When an instruction cannot be decoded just return to userspace so bhyve(8) 2015-04-30 21:00:47 +00:00
x86.c Do a proper emulation of guest writes to MSR_EFER. 2015-05-06 05:40:20 +00:00
x86.h Do a proper emulation of guest writes to MSR_EFER. 2015-05-06 05:40:20 +00:00