Rafal Jaworowski 570255d8a5 Do not use OCP85XX_LBC_OFF twice when accessing LBC registers on MPC85XX. ... It turns LBC control registers were not programmed correctly on MPC85XX. We were accessing bogus addresses as the base offset (OCP85XX_LBC_OFF) was erroneously added during offset calculations. Effectively the state of LBC control registers was not altered by the kernel initialization code, but everything worked as long as we coincided to use the same settings (LBC decode windows) as firmware has initialized. Submitted by: Lukasz Wojcik Reviewed by: marcel Approved by: re (kensmith) Obtained from: Semihalf		2009-07-21 08:38:45 +00:00
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atpic.c	Mark the cascaded AT interrupt handler as MP safe to avoid having	2009-05-31 01:56:06 +00:00
ds1553_bus_lbc.c	More precise description of the DS1553 driver.	2009-06-24 15:48:20 +00:00
ds1553_core.c	DS1553 RTC module driver. On the MPC8555CDS system it hangs off of the LBC bus.	2009-06-22 15:48:47 +00:00
ds1553_reg.h	DS1553 RTC module driver. On the MPC8555CDS system it hangs off of the LBC bus.	2009-06-22 15:48:47 +00:00
i2c.c	Integrated I2C controller driver (found in MPC85xx and other SOC parts).	2009-06-22 15:34:32 +00:00
isa.c	Add suppport for ISA and ISA interrupts to make the ATA	2009-04-24 03:51:11 +00:00
lbc.c
lbc.h	Do not use OCP85XX_LBC_OFF twice when accessing LBC registers on MPC85XX.	2009-07-21 08:38:45 +00:00
mpc85xx.c
mpc85xx.h
nexus.c
ocpbus.c	Initial version of the sec(4) driver for the integrated security engine found	2009-06-06 09:37:55 +00:00
ocpbus.h	Initial version of the sec(4) driver for the integrated security engine found	2009-06-06 09:37:55 +00:00
opic.c
pci_ocp.c	Add suppport for ISA and ISA interrupts to make the ATA	2009-04-24 03:51:11 +00:00