20a9f7715e
Sponsored by: DARPA, AFRL
405 lines
9.2 KiB
C
405 lines
9.2 KiB
C
/*-
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* Copyright (c) 2012-2016 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* RME HDSPe driver for FreeBSD.
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* Supported cards: AIO, RayDAT.
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*/
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#include <dev/sound/pcm/sound.h>
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#include <dev/sound/pci/hdspe.h>
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#include <dev/sound/chip.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <mixer_if.h>
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SND_DECLARE_FILE("$FreeBSD$");
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static struct hdspe_channel chan_map_aio[] = {
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{ 0, 1, "line", 1, 1 },
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{ 6, 7, "phone", 1, 0 },
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{ 8, 9, "aes", 1, 1 },
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{ 10, 11, "s/pdif", 1, 1 },
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{ 12, 16, "adat", 1, 1 },
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/* Single or double speed. */
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{ 14, 18, "adat", 1, 1 },
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/* Single speed only. */
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{ 13, 15, "adat", 1, 1 },
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{ 17, 19, "adat", 1, 1 },
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{ 0, 0, NULL, 0, 0 },
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};
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static struct hdspe_channel chan_map_rd[] = {
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{ 0, 1, "aes", 1, 1 },
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{ 2, 3, "s/pdif", 1, 1 },
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{ 4, 5, "adat", 1, 1 },
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{ 6, 7, "adat", 1, 1 },
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{ 8, 9, "adat", 1, 1 },
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{ 10, 11, "adat", 1, 1 },
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/* Single or double speed. */
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{ 12, 13, "adat", 1, 1 },
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{ 14, 15, "adat", 1, 1 },
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{ 16, 17, "adat", 1, 1 },
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{ 18, 19, "adat", 1, 1 },
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/* Single speed only. */
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{ 20, 21, "adat", 1, 1 },
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{ 22, 23, "adat", 1, 1 },
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{ 24, 25, "adat", 1, 1 },
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{ 26, 27, "adat", 1, 1 },
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{ 28, 29, "adat", 1, 1 },
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{ 30, 31, "adat", 1, 1 },
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{ 32, 33, "adat", 1, 1 },
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{ 34, 35, "adat", 1, 1 },
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{ 0, 0, NULL, 0, 0 },
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};
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static void
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hdspe_intr(void *p)
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{
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struct sc_pcminfo *scp;
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struct sc_info *sc;
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device_t *devlist;
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int devcount;
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int status;
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int err;
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int i;
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sc = (struct sc_info *)p;
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snd_mtxlock(sc->lock);
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status = hdspe_read_1(sc, HDSPE_STATUS_REG);
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if (status & HDSPE_AUDIO_IRQ_PENDING) {
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if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
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return;
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for (i = 0; i < devcount; i++) {
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scp = device_get_ivars(devlist[i]);
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if (scp->ih != NULL)
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scp->ih(scp);
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}
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hdspe_write_1(sc, HDSPE_INTERRUPT_ACK, 0);
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free(devlist, M_TEMP);
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}
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snd_mtxunlock(sc->lock);
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}
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static void
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hdspe_dmapsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error)
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{
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struct sc_info *sc;
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sc = (struct sc_info *)arg;
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#if 0
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device_printf(sc->dev, "hdspe_dmapsetmap()\n");
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#endif
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}
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static int
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hdspe_alloc_resources(struct sc_info *sc)
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{
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/* Allocate resource. */
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sc->csid = PCIR_BAR(0);
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sc->cs = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
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&sc->csid, RF_ACTIVE);
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if (!sc->cs) {
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device_printf(sc->dev, "Unable to map SYS_RES_MEMORY.\n");
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return (ENXIO);
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}
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sc->cst = rman_get_bustag(sc->cs);
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sc->csh = rman_get_bushandle(sc->cs);
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/* Allocate interrupt resource. */
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sc->irqid = 0;
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sc->irq = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, &sc->irqid,
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RF_ACTIVE | RF_SHAREABLE);
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if (!sc->irq ||
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bus_setup_intr(sc->dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV,
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NULL, hdspe_intr, sc, &sc->ih)) {
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device_printf(sc->dev, "Unable to alloc interrupt resource.\n");
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return (ENXIO);
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}
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/* Allocate DMA resources. */
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if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(sc->dev),
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/*alignment*/4,
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/*boundary*/0,
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/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
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/*highaddr*/BUS_SPACE_MAXADDR,
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/*filter*/NULL,
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/*filterarg*/NULL,
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/*maxsize*/2 * HDSPE_DMASEGSIZE,
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/*nsegments*/2,
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/*maxsegsz*/HDSPE_DMASEGSIZE,
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/*flags*/0,
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/*lockfunc*/busdma_lock_mutex,
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/*lockarg*/&Giant,
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/*dmatag*/&sc->dmat) != 0) {
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device_printf(sc->dev, "Unable to create dma tag.\n");
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return (ENXIO);
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}
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sc->bufsize = HDSPE_DMASEGSIZE;
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/* pbuf (play buffer). */
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if (bus_dmamem_alloc(sc->dmat, (void **)&sc->pbuf,
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BUS_DMA_NOWAIT, &sc->pmap)) {
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device_printf(sc->dev, "Can't alloc pbuf.\n");
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return (ENXIO);
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}
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if (bus_dmamap_load(sc->dmat, sc->pmap, sc->pbuf, sc->bufsize,
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hdspe_dmapsetmap, sc, 0)) {
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device_printf(sc->dev, "Can't load pbuf.\n");
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return (ENXIO);
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}
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/* rbuf (rec buffer). */
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if (bus_dmamem_alloc(sc->dmat, (void **)&sc->rbuf,
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BUS_DMA_NOWAIT, &sc->rmap)) {
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device_printf(sc->dev, "Can't alloc rbuf.\n");
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return (ENXIO);
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}
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if (bus_dmamap_load(sc->dmat, sc->rmap, sc->rbuf, sc->bufsize,
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hdspe_dmapsetmap, sc, 0)) {
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device_printf(sc->dev, "Can't load rbuf.\n");
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return (ENXIO);
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}
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bzero(sc->pbuf, sc->bufsize);
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bzero(sc->rbuf, sc->bufsize);
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return (0);
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}
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static void
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hdspe_map_dmabuf(struct sc_info *sc)
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{
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uint32_t paddr, raddr;
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int i;
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paddr = vtophys(sc->pbuf);
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raddr = vtophys(sc->rbuf);
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for (i = 0; i < HDSPE_MAX_SLOTS * 16; i++) {
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hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_OUT + 4 * i,
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paddr + i * 4096);
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hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_IN + 4 * i,
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raddr + i * 4096);
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}
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}
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static int
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hdspe_probe(device_t dev)
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{
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uint32_t rev;
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if (pci_get_vendor(dev) == PCI_VENDOR_XILINX &&
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pci_get_device(dev) == PCI_DEVICE_XILINX_HDSPE) {
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rev = pci_get_revid(dev);
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switch (rev) {
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case PCI_REVISION_AIO:
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device_set_desc(dev, "RME HDSPe AIO");
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return (0);
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case PCI_REVISION_RAYDAT:
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device_set_desc(dev, "RME HDSPe RayDAT");
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return (0);
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}
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}
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return (ENXIO);
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}
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static int
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hdspe_init(struct sc_info *sc)
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{
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long long period;
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/* Set defaults. */
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sc->ctrl_register |= HDSPM_CLOCK_MODE_MASTER;
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/* Set latency. */
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sc->period = 32;
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sc->ctrl_register = hdspe_encode_latency(7);
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/* Set rate. */
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sc->speed = HDSPE_SPEED_DEFAULT;
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sc->ctrl_register &= ~HDSPE_FREQ_MASK;
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sc->ctrl_register |= HDSPE_FREQ_MASK_DEFAULT;
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hdspe_write_4(sc, HDSPE_CONTROL_REG, sc->ctrl_register);
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switch (sc->type) {
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case RAYDAT:
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case AIO:
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period = HDSPE_FREQ_AIO;
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break;
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default:
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return (ENXIO);
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}
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/* Set DDS value. */
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period /= sc->speed;
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hdspe_write_4(sc, HDSPE_FREQ_REG, period);
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/* Other settings. */
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sc->settings_register = 0;
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hdspe_write_4(sc, HDSPE_SETTINGS_REG, sc->settings_register);
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return (0);
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}
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static int
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hdspe_attach(device_t dev)
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{
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struct hdspe_channel *chan_map;
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struct sc_pcminfo *scp;
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struct sc_info *sc;
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uint32_t rev;
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int i, err;
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#if 0
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device_printf(dev, "hdspe_attach()\n");
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#endif
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sc = device_get_softc(dev);
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sc->lock = snd_mtxcreate(device_get_nameunit(dev),
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"snd_hdspe softc");
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sc->dev = dev;
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pci_enable_busmaster(dev);
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rev = pci_get_revid(dev);
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switch (rev) {
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case PCI_REVISION_AIO:
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sc->type = AIO;
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chan_map = chan_map_aio;
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break;
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case PCI_REVISION_RAYDAT:
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sc->type = RAYDAT;
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chan_map = chan_map_rd;
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break;
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default:
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return (ENXIO);
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}
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/* Allocate resources. */
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err = hdspe_alloc_resources(sc);
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if (err) {
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device_printf(dev, "Unable to allocate system resources.\n");
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return (ENXIO);
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}
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if (hdspe_init(sc) != 0)
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return (ENXIO);
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for (i = 0; i < HDSPE_MAX_CHANS && chan_map[i].descr != NULL; i++) {
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scp = malloc(sizeof(struct sc_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
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scp->hc = &chan_map[i];
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scp->sc = sc;
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scp->dev = device_add_child(dev, "pcm", -1);
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device_set_ivars(scp->dev, scp);
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}
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hdspe_map_dmabuf(sc);
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return (bus_generic_attach(dev));
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}
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static void
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hdspe_dmafree(struct sc_info *sc)
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{
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bus_dmamap_unload(sc->dmat, sc->rmap);
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bus_dmamap_unload(sc->dmat, sc->pmap);
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bus_dmamem_free(sc->dmat, sc->rbuf, sc->rmap);
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bus_dmamem_free(sc->dmat, sc->pbuf, sc->pmap);
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sc->rbuf = sc->pbuf = NULL;
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}
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static int
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hdspe_detach(device_t dev)
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{
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struct sc_info *sc;
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int err;
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sc = device_get_softc(dev);
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if (sc == NULL) {
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device_printf(dev,"Can't detach: softc is null.\n");
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return (0);
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}
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err = device_delete_children(dev);
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if (err)
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return (err);
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hdspe_dmafree(sc);
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if (sc->ih)
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bus_teardown_intr(dev, sc->irq, sc->ih);
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if (sc->dmat)
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bus_dma_tag_destroy(sc->dmat);
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if (sc->irq)
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
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if (sc->cs)
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bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0), sc->cs);
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if (sc->lock)
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snd_mtxfree(sc->lock);
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return (0);
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}
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static device_method_t hdspe_methods[] = {
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DEVMETHOD(device_probe, hdspe_probe),
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DEVMETHOD(device_attach, hdspe_attach),
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DEVMETHOD(device_detach, hdspe_detach),
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{ 0, 0 }
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};
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static driver_t hdspe_driver = {
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"hdspe",
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hdspe_methods,
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PCM_SOFTC_SIZE,
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};
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static devclass_t hdspe_devclass;
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DRIVER_MODULE(snd_hdspe, pci, hdspe_driver, hdspe_devclass, 0, 0);
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