fd3ddbd038
The nxge driver provides support for Neterion Xframe-I and Xframe-II adapters. The driver supports TCP Segmentation Offload (TSO/LSO), Jumbo frames (5 buffer mode), Header separation (2 and 3 Receive buffer modes), VLAN, and Promiscuous mode. Submitted by: Neterion Reviewed by: rwatson Approved by: re (kensmith)
615 lines
20 KiB
C
615 lines
20 KiB
C
/*-
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* Copyright (c) 2002-2007 Neterion, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* FileName : xge-os-template.h
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*
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* Description: Template for creating platform-dependent "glue" code.
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*
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* Created: 6 May 2004
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*/
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#ifndef XGE_OS_TEMPLATE_H
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#define XGE_OS_TEMPLATE_H
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#ifndef TEMPLATE
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# error "should not be compiled for platforms other than TEMPLATE..."
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#endif
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/* ------------------------- includes and defines ------------------------- */
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/*
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* Note:
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*
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* - on some operating systems like Linux & FreeBSD, there is a macro
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* by using which it is possible to determine endiennes automatically
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*/
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#define XGE_OS_HOST_BIG_ENDIAN TEMPLATE
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#define XGE_OS_HOST_PAGE_SIZE TEMPLATE
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/* ---------------------- fixed size primitive types -----------------------*/
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/*
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* Note:
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*
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* - u## - means ## bits unsigned int/long
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* - all names must be preserved since HAL using them.
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* - ulong_t is platform specific, i.e. for 64bit - 64bit size, for
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* 32bit - 32bit size
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*/
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#define TEMPLATE u8
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#define TEMPLATE u16
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#define TEMPLATE u32
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#define TEMPLATE u64
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#define TEMPLATE ulong_t
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#define TEMPLATE ptrdiff_t
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#define TEMPLATE dma_addr_t
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#define TEMPLATE spinlock_t
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typedef TEMPLATE pci_dev_h;
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typedef TEMPLATE pci_reg_h;
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typedef TEMPLATE pci_dma_h;
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typedef TEMPLATE pci_irq_h;
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typedef TEMPLATE pci_cfg_h;
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typedef TEMPLATE pci_dma_acc_h;
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/* -------------------------- "libc" functionality -------------------------*/
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/*
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* Note:
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*
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* - "libc" functionality maps one-to-one to be posix-like
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*/
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/* Note: use typedef: xge_os_memzero(void* mem, int size); */
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#define xge_os_memzero TEMPLATE
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/* Note: the 1st argument MUST be destination, like in:
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* void *memcpy(void *dest, const void *src, size_t n);
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*/
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#define xge_os_memcpy TEMPLATE
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/* Note: should accept format (the 1st argument) and a variable
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* number of arguments thereafter.. */
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#define xge_os_printf(fmt...) TEMPLATE
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#define xge_os_vasprintf(buf, fmt...) TEMPLATE
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#define xge_os_sprintf(buf, fmt, ...) TEMPLATE
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#define xge_os_timestamp(buf) TEMPLATE
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#define xge_os_println TEMPLATE
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/* -------------------- synchronization primitives -------------------------*/
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/*
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* Note:
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*
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* - use spin_lock in interrupts or in threads when there is no races
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* with interrupt
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* - use spin_lock_irqsave in threads if there is a race with interrupt
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* - use spin_lock_irqsave for nested locks
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*/
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/*
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* Initialize the spin lock.
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*/
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#define xge_os_spin_lock_init(lockp, ctxh) TEMPLATE
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/*
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* Initialize the spin lock (IRQ version).
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*/
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#define xge_os_spin_lock_init_irq(lockp, ctxh) TEMPLATE
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/*
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* Destroy the lock.
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*/
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#define xge_os_spin_lock_destroy(lockp, ctxh) TEMPLATE
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/*
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* Destroy the lock (IRQ version).
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*/
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#define xge_os_spin_lock_destroy_irq(lockp, ctxh) TEMPLATE
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/*
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* Acquire the lock.
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*/
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#define xge_os_spin_lock(lockp) TEMPLATE
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/*
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* Release the lock.
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*/
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#define xge_os_spin_unlock(lockp) TEMPLATE
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/*
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* Acquire the lock(IRQ version).
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*/
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#define xge_os_spin_lock_irq(lockp, flags) TEMPLATE
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/*
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* Release the lock(IRQ version).
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*/
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#define xge_os_spin_unlock_irq(lockp, flags) TEMPLATE
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/*
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* Write memory barrier.
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*/
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#define xge_os_wmb() TEMPLATE
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/*
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* Delay (in micro seconds).
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*/
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#define xge_os_udelay(us) TEMPLATE
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/*
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* Delay (in milli seconds).
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*/
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#define xge_os_mdelay(ms) TEMPLATE
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/*
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* Compare and exchange.
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*/
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#define xge_os_cmpxchg(targetp, cmp, newval) TEMPLATE
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/* ------------------------- misc primitives -------------------------------*/
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#define xge_os_prefetch TEMPLATE
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#define xge_os_prefetchw TEMPLATE
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#define xge_os_bug(fmt...) TEMPLATE
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/* -------------------------- compiler stuffs ------------------------------*/
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#define __xge_os_attr_cacheline_aligned TEMPLATE
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/* ---------------------- memory primitives --------------------------------*/
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/**
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* xge_os_malloc - Allocate non DMA-able memory.
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* @pdev: Device context. Some OSs require device context to perform
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* operations on memory.
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* @size: Size to allocate.
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*
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* Allocate @size bytes of memory. This allocation can sleep, and
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* therefore, and therefore it requires process context. In other words,
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* xge_os_malloc() cannot be called from the interrupt context.
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* Use xge_os_free() to free the allocated block.
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*
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* Returns: Pointer to allocated memory, NULL - on failure.
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*
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* See also: xge_os_free().
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*/
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static inline void *xge_os_malloc(IN pci_dev_h pdev,
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IN unsigned long size)
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{ TEMPLATE; }
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/**
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* xge_os_free - Free non DMA-able memory.
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* @pdev: Device context. Some OSs require device context to perform
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* operations on memory.
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* @vaddr: Address of the allocated memory block.
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* @size: Some OS's require to provide size on free
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*
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* Free the memory area obtained via xge_os_malloc().
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* This call may also sleep, and therefore it cannot be used inside
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* interrupt.
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*
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* See also: xge_os_malloc().
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*/
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static inline void xge_os_free(IN pci_dev_h pdev,
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IN const void *vaddr,
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IN unsigned long size)
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{ TEMPLATE; }
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/**
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* xge_os_vaddr - Get Virtual address for the given physical address.
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* @pdev: Device context. Some OSs require device context to perform
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* operations on memory.
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* @vaddr: Physical Address of the memory block.
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* @size: Some OS's require to provide size
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*
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* Get the virtual address for physical address.
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* This call may also sleep, and therefore it cannot be used inside
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* interrupt.
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*
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* See also: xge_os_malloc().
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*/
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static inline void xge_os_vaddr(IN pci_dev_h pdev,
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IN const void *vaddr,
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IN unsigned long size)
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{ TEMPLATE; }
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/**
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* xge_os_dma_malloc - Allocate DMA-able memory.
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* @pdev: Device context. Used to allocate/pin/map/unmap DMA-able memory.
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* @size: Size (in bytes) to allocate.
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* @dma_flags: XGE_OS_DMA_CACHELINE_ALIGNED,
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* XGE_OS_DMA_STREAMING,
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* XGE_OS_DMA_CONSISTENT
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* Note that the last two flags are mutually exclusive.
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* @p_dmah: Handle used to map the memory onto the corresponding device memory
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* space. See xge_os_dma_map(). The handle is an out-parameter
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* returned by the function.
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* @p_dma_acch: One more DMA handle used subsequently to free the
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* DMA object (via xge_os_dma_free()).
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* Note that this and the previous handle have
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* physical meaning for Solaris; on Windows and Linux the
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* corresponding value will be simply a pointer to PCI device.
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* The value is returned by this function.
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*
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* Allocate DMA-able contiguous memory block of the specified @size.
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* This memory can be subsequently freed using xge_os_dma_free().
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* Note: can be used inside interrupt context.
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*
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* Returns: Pointer to allocated memory(DMA-able), NULL on failure.
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*
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*/
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static inline void *xge_os_dma_malloc(IN pci_dev_h pdev,
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IN unsigned long size,
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IN int dma_flags,
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OUT pci_dma_h *p_dmah,
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OUT pci_dma_acc_h *p_dma_acch)
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{ TEMPLATE; }
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/**
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* xge_os_dma_free - Free previously allocated DMA-able memory.
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* @pdev: Device context. Used to allocate/pin/map/unmap DMA-able memory.
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* @vaddr: Virtual address of the DMA-able memory.
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* @p_dma_acch: DMA handle used to free the resource.
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* @p_dmah: DMA handle used for mapping. See xge_os_dma_malloc().
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*
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* Free DMA-able memory originally allocated by xge_os_dma_malloc().
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* Note: can be used inside interrupt.
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* See also: xge_os_dma_malloc().
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*/
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static inline void xge_os_dma_free (IN pci_dev_h pdev,
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IN const void *vaddr,
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IN pci_dma_acc_h *p_dma_acch,
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IN pci_dma_h *p_dmah)
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{ TEMPLATE; }
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/* ----------------------- io/pci/dma primitives ---------------------------*/
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#define XGE_OS_DMA_DIR_TODEVICE TEMPLATE
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#define XGE_OS_DMA_DIR_FROMDEVICE TEMPLATE
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#define XGE_OS_DMA_DIR_BIDIRECTIONAL TEMPLATE
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/**
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* xge_os_pci_read8 - Read one byte from device PCI configuration.
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* @pdev: Device context. Some OSs require device context to perform
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* PIO and/or config space IO.
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* @cfgh: PCI configuration space handle.
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* @where: Offset in the PCI configuration space.
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* @val: Address of the result.
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*
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* Read byte value from the specified @regh PCI configuration space at the
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* specified offset = @where.
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* Returns: 0 - success, non-zero - failure.
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*/
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static inline int xge_os_pci_read8(IN pci_dev_h pdev,
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IN pci_cfg_h cfgh,
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IN int where,
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IN u8 *val)
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{ TEMPLATE; }
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/**
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* xge_os_pci_write8 - Write one byte into device PCI configuration.
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* @pdev: Device context. Some OSs require device context to perform
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* PIO and/or config space IO.
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* @cfgh: PCI configuration space handle.
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* @where: Offset in the PCI configuration space.
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* @val: Value to write.
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*
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* Write byte value into the specified PCI configuration space
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* Returns: 0 - success, non-zero - failure.
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*/
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static inline int xge_os_pci_write8(IN pci_dev_h pdev,
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IN pci_cfg_h cfgh,
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IN int where,
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IN u8 val)
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{ TEMPLATE; }
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/**
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* xge_os_pci_read16 - Read 16bit word from device PCI configuration.
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* @pdev: Device context. Some OSs require device context to perform
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* PIO and/or config space IO.
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* @cfgh: PCI configuration space handle.
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* @where: Offset in the PCI configuration space.
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* @val: Address of the 16bit result.
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*
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* Read 16bit value from the specified PCI configuration space at the
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* specified offset.
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* Returns: 0 - success, non-zero - failure.
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*/
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static inline int xge_os_pci_read16(IN pci_dev_h pdev,
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IN pci_cfg_h cfgh,
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IN int where,
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IN u16 *val)
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{ TEMPLATE; }
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/**
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* xge_os_pci_write16 - Write 16bit word into device PCI configuration.
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* @pdev: Device context. Some OSs require device context to perform
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* PIO and/or config space IO.
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* @cfgh: PCI configuration space handle.
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* @where: Offset in the PCI configuration space.
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* @val: Value to write.
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*
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* Write 16bit value into the specified @offset in PCI
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* configuration space.
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* Returns: 0 - success, non-zero - failure.
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*/
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static inline int xge_os_pci_write16(IN pci_dev_h pdev,
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IN pci_cfg_h cfgh,
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IN int where,
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IN u16 val)
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{ TEMPLATE; }
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/**
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* xge_os_pci_read32 - Read 32bit word from device PCI configuration.
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* @pdev: Device context. Some OSs require device context to perform
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* PIO and/or config space IO.
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* @cfgh: PCI configuration space handle.
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* @where: Offset in the PCI configuration space.
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* @val: Address of 32bit result.
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*
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* Read 32bit value from the specified PCI configuration space at the
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* specified offset.
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* Returns: 0 - success, non-zero - failure.
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*/
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static inline int xge_os_pci_read32(IN pci_dev_h pdev,
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IN pci_cfg_h cfgh,
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IN int where,
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IN u32 *val)
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{ TEMPLATE; }
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/**
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* xge_os_pci_write32 - Write 32bit word into device PCI configuration.
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* @pdev: Device context. Some OSs require device context to perform
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* PIO and/or config space IO.
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* @cfgh: PCI configuration space handle.
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* @where: Offset in the PCI configuration space.
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* @val: Value to write.
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*
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* Write 32bit value into the specified @offset in PCI
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* configuration space.
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* Returns: 0 - success, non-zero - failure.
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*/
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static inline int xge_os_pci_write32(IN pci_dev_h pdev,
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IN pci_cfg_h cfgh,
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IN int where,
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IN u32 val)
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{ TEMPLATE; }
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/**
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* xge_os_pio_mem_read8 - Read 1 byte from device memory mapped space.
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* @pdev: Device context. Some OSs require device context to perform
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* PIO and/or config space IO..
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* @regh: PCI configuration space handle.
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* @addr: Address in device memory space.
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*
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* Returns: 1 byte value read from the specified (mapped) memory space address.
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*/
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static inline u8 xge_os_pio_mem_read8(IN pci_dev_h pdev,
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IN pci_reg_h regh,
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IN void *addr)
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{ TEMPLATE; }
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/**
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* xge_os_pio_mem_write64 - Write 1 byte into device memory mapped
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* space.
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* @pdev: Device context. Some OSs require device context to perform
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* PIO and/or config space IO..
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* @regh: PCI configuration space handle.
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* @val: Value to write.
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* @addr: Address in device memory space.
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*
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* Write byte value into the specified (mapped) device memory space.
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*/
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static inline void xge_os_pio_mem_write8(IN pci_dev_h pdev,
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IN pci_reg_h regh,
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IN u8 val,
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IN void *addr)
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{ TEMPLATE; }
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/**
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* xge_os_pio_mem_read16 - Read 16bit from device memory mapped space.
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* @pdev: Device context. Some OSs require device context to perform
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* PIO.
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* @regh: PCI configuration space handle.
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* @addr: Address in device memory space.
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*
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* Returns: 16bit value read from the specified (mapped) memory space address.
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*/
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static inline u16 xge_os_pio_mem_read16(IN pci_dev_h pdev,
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IN pci_reg_h regh,
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IN void *addr)
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{
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TEMPLATE; }
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/**
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* xge_os_pio_mem_write16 - Write 16bit into device memory mapped space.
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* @pdev: Device context. Some OSs require device context to perform
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* PIO.
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* @regh: PCI configuration space handle.
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* @val: Value to write.
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* @addr: Address in device memory space.
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*
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* Write 16bit value into the specified (mapped) device memory space.
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*/
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static inline void xge_os_pio_mem_write16(IN pci_dev_h pdev,
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IN pci_reg_h regh,
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IN u16 val,
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IN void *addr)
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{ TEMPLATE; }
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/**
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* xge_os_pio_mem_read32 - Read 32bit from device memory mapped space.
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* @pdev: Device context. Some OSs require device context to perform
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* PIO.
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* @regh: PCI configuration space handle.
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* @addr: Address in device memory space.
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*
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* Returns: 32bit value read from the specified (mapped) memory space address.
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*/
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static inline u32 xge_os_pio_mem_read32(IN pci_dev_h pdev,
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IN pci_reg_h regh,
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IN void *addr)
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{ TEMPLATE; }
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/**
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* xge_os_pio_mem_write32 - Write 32bit into device memory space.
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* @pdev: Device context. Some OSs require device context to perform
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* PIO.
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* @regh: PCI configuration space handle.
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* @val: Value to write.
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* @addr: Address in device memory space.
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*
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* Write 32bit value into the specified (mapped) device memory space.
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*/
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static inline void xge_os_pio_mem_write32(IN pci_dev_h pdev,
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IN pci_reg_h regh,
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IN u32 val,
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IN void *addr)
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{ TEMPLATE; }
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/**
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* xge_os_pio_mem_read64 - Read 64bit from device memory mapped space.
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* @pdev: Device context. Some OSs require device context to perform
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* PIO.
|
|
* @regh: PCI configuration space handle.
|
|
* @addr: Address in device memory space.
|
|
*
|
|
* Returns: 64bit value read from the specified (mapped) memory space address.
|
|
*/
|
|
static inline u64 xge_os_pio_mem_read64(IN pci_dev_h pdev,
|
|
IN pci_reg_h regh,
|
|
IN void *addr)
|
|
{ TEMPLATE; }
|
|
|
|
/**
|
|
* xge_os_pio_mem_write64 - Write 64bit into device memory space.
|
|
* @pdev: Device context. Some OSs require device context to perform
|
|
* PIO.
|
|
* @regh: PCI configuration space handle.
|
|
* @val: Value to write.
|
|
* @addr: Address in device memory space.
|
|
*
|
|
* Write 64bit value into the specified (mapped) device memory space.
|
|
*/
|
|
static inline void xge_os_pio_mem_write64(IN pci_dev_h pdev,
|
|
IN pci_reg_h regh,
|
|
IN u64 val,
|
|
IN void *addr)
|
|
{ TEMPLATE; }
|
|
|
|
/**
|
|
* xge_os_flush_bridge - Flush the bridge.
|
|
* @pdev: Device context. Some OSs require device context to perform
|
|
* PIO.
|
|
* @regh: PCI configuration space handle.
|
|
* @addr: Address in device memory space.
|
|
*
|
|
* Flush the bridge.
|
|
*/
|
|
static inline void xge_os_flush_bridge(IN pci_dev_h pdev,
|
|
IN pci_reg_h regh,
|
|
IN void *addr)
|
|
{ TEMPLATE; }
|
|
|
|
/**
|
|
* xge_os_dma_map - Map DMA-able memory block to, or from, or
|
|
* to-and-from device.
|
|
* @pdev: Device context. Used to allocate/pin/map/unmap DMA-able memory.
|
|
* @dmah: DMA handle used to map the memory block. Obtained via
|
|
* xge_os_dma_malloc().
|
|
* @vaddr: Virtual address of the DMA-able memory.
|
|
* @size: Size (in bytes) to be mapped.
|
|
* @dir: Direction of this operation (XGE_OS_DMA_DIR_TODEVICE, etc.)
|
|
* @dma_flags: XGE_OS_DMA_CACHELINE_ALIGNED,
|
|
* XGE_OS_DMA_STREAMING,
|
|
* XGE_OS_DMA_CONSISTENT
|
|
* Note that the last two flags are mutually exclusive.
|
|
*
|
|
* Map a single memory block.
|
|
*
|
|
* Returns: DMA address of the memory block,
|
|
* XGE_OS_INVALID_DMA_ADDR on failure.
|
|
*
|
|
* See also: xge_os_dma_malloc(), xge_os_dma_unmap(),
|
|
* xge_os_dma_sync().
|
|
*/
|
|
static inline dma_addr_t xge_os_dma_map(IN pci_dev_h pdev,
|
|
IN pci_dma_h dmah,
|
|
IN void *vaddr,
|
|
IN size_t size,
|
|
IN int dir,
|
|
IN int dma_flags)
|
|
{ TEMPLATE; }
|
|
|
|
/**
|
|
* xge_os_dma_unmap - Unmap DMA-able memory.
|
|
* @pdev: Device context. Used to allocate/pin/map/unmap DMA-able memory.
|
|
* @dmah: DMA handle used to map the memory block. Obtained via
|
|
* xge_os_dma_malloc().
|
|
* @dma_addr: DMA address of the block. Obtained via xge_os_dma_map().
|
|
* @size: Size (in bytes) to be unmapped.
|
|
* @dir: Direction of this operation (XGE_OS_DMA_DIR_TODEVICE, etc.)
|
|
*
|
|
* Unmap a single DMA-able memory block that was previously mapped
|
|
* using xge_os_dma_map().
|
|
* See also: xge_os_dma_malloc(), xge_os_dma_map().
|
|
*/
|
|
static inline void xge_os_dma_unmap(IN pci_dev_h pdev,
|
|
IN pci_dma_h dmah,
|
|
IN dma_addr_t dma_addr,
|
|
IN size_t size,
|
|
IN int dir)
|
|
{ TEMPLATE; }
|
|
|
|
/**
|
|
* xge_os_dma_sync - Synchronize mapped memory.
|
|
* @pdev: Device context. Used to allocate/pin/map/unmap DMA-able memory.
|
|
* @dmah: DMA handle used to map the memory block. Obtained via
|
|
* xge_os_dma_malloc().
|
|
* @dma_addr: DMA address of the block. Obtained via xge_os_dma_map().
|
|
* @dma_offset: Offset from start of the blocke. Used by Solaris only.
|
|
* @length: Size of the block.
|
|
* @dir: Direction of this operation (XGE_OS_DMA_DIR_TODEVICE, etc.)
|
|
*
|
|
* Make physical and CPU memory consistent for a single
|
|
* streaming mode DMA translation.
|
|
* This API compiles to NOP on cache-coherent platforms.
|
|
* On non cache-coherent platforms, depending on the direction
|
|
* of the "sync" operation, this API will effectively
|
|
* either invalidate CPU cache (that might contain old data),
|
|
* or flush CPU cache to update physical memory.
|
|
* See also: xge_os_dma_malloc(), xge_os_dma_map(),
|
|
* xge_os_dma_unmap().
|
|
*/
|
|
static inline void xge_os_dma_sync(IN pci_dev_h pdev,
|
|
IN pci_dma_h dmah,
|
|
IN dma_addr_t dma_addr,
|
|
IN u64 dma_offset,
|
|
IN size_t length,
|
|
IN int dir)
|
|
{ TEMPLATE; }
|
|
|
|
#endif /* XGE_OS_TEMPLATE_H */
|