e27c6c9fa2
This comes with several PCI_VENDOR_ID_* defines which should go in a more central place.
176 lines
4.9 KiB
C
176 lines
4.9 KiB
C
/*-
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* Copyright 2003 Eric Anholt.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/**
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* \file drm_pci.h
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* \brief PCI consistent, DMA-accessible memory allocation.
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*
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* \author Eric Anholt <anholt@FreeBSD.org>
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*/
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#include <dev/drm2/drmP.h>
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/**********************************************************************/
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/** \name PCI memory */
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/*@{*/
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static void
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drm_pci_busdma_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
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{
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drm_dma_handle_t *dmah = arg;
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if (error != 0)
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return;
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KASSERT(nsegs == 1, ("drm_pci_busdma_callback: bad dma segment count"));
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dmah->busaddr = segs[0].ds_addr;
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}
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/**
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* \brief Allocate a physically contiguous DMA-accessible consistent
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* memory block.
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*/
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drm_dma_handle_t *
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drm_pci_alloc(struct drm_device *dev, size_t size,
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size_t align, dma_addr_t maxaddr)
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{
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drm_dma_handle_t *dmah;
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int ret;
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/* Need power-of-two alignment, so fail the allocation if it isn't. */
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if ((align & (align - 1)) != 0) {
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DRM_ERROR("drm_pci_alloc with non-power-of-two alignment %d\n",
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(int)align);
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return NULL;
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}
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dmah = malloc(sizeof(drm_dma_handle_t), DRM_MEM_DMA, M_ZERO | M_NOWAIT);
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if (dmah == NULL)
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return NULL;
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/* Make sure we aren't holding mutexes here */
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mtx_assert(&dev->dma_lock, MA_NOTOWNED);
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if (mtx_owned(&dev->dma_lock))
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DRM_ERROR("called while holding dma_lock\n");
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ret = bus_dma_tag_create(NULL, align, 0, /* tag, align, boundary */
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maxaddr, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */
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NULL, NULL, /* filtfunc, filtfuncargs */
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size, 1, size, /* maxsize, nsegs, maxsegsize */
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0, NULL, NULL, /* flags, lockfunc, lockfuncargs */
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&dmah->tag);
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if (ret != 0) {
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free(dmah, DRM_MEM_DMA);
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return NULL;
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}
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ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr,
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BUS_DMA_WAITOK | BUS_DMA_ZERO | BUS_DMA_NOCACHE, &dmah->map);
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if (ret != 0) {
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bus_dma_tag_destroy(dmah->tag);
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free(dmah, DRM_MEM_DMA);
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return NULL;
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}
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ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr, size,
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drm_pci_busdma_callback, dmah, BUS_DMA_NOWAIT);
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if (ret != 0) {
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bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
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bus_dma_tag_destroy(dmah->tag);
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free(dmah, DRM_MEM_DMA);
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return NULL;
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}
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return dmah;
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}
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/**
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* \brief Free a DMA-accessible consistent memory block.
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*/
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void
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drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah)
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{
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if (dmah == NULL)
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return;
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bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
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bus_dma_tag_destroy(dmah->tag);
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free(dmah, DRM_MEM_DMA);
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}
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/*@}*/
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int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask)
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{
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device_t root;
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int pos;
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u32 lnkcap = 0, lnkcap2 = 0;
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*mask = 0;
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if (!drm_device_is_pcie(dev))
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return -EINVAL;
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root = device_get_parent(dev->device);
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pos = 0;
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pci_find_cap(root, PCIY_EXPRESS, &pos);
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if (!pos)
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return -EINVAL;
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/* we've been informed via and serverworks don't make the cut */
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if (pci_get_vendor(root) == PCI_VENDOR_ID_VIA ||
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pci_get_vendor(root) == PCI_VENDOR_ID_SERVERWORKS)
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return -EINVAL;
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lnkcap = pci_read_config(root, pos + PCIER_LINK_CAP, 4);
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lnkcap2 = pci_read_config(root, pos + PCIER_LINK_CAP2, 4);
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lnkcap &= PCIEM_LINK_CAP_MAX_SPEED;
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lnkcap2 &= 0xfe;
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#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x02 /* Supported Link Speed 2.5GT/s */
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#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x04 /* Supported Link Speed 5.0GT/s */
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#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x08 /* Supported Link Speed 8.0GT/s */
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if (lnkcap2) { /* PCIE GEN 3.0 */
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if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB)
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*mask |= DRM_PCIE_SPEED_25;
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if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB)
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*mask |= DRM_PCIE_SPEED_50;
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if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB)
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*mask |= DRM_PCIE_SPEED_80;
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} else {
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if (lnkcap & 1)
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*mask |= DRM_PCIE_SPEED_25;
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if (lnkcap & 2)
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*mask |= DRM_PCIE_SPEED_50;
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}
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DRM_INFO("probing gen 2 caps for device %x:%x = %x/%x\n", pci_get_vendor(root), pci_get_device(root), lnkcap, lnkcap2);
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return 0;
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}
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