268 lines
8.8 KiB
C
268 lines
8.8 KiB
C
/*-
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* ichsmb_pci.c
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*
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* Author: Archie Cobbs <archie@freebsd.org>
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* Copyright (c) 2000 Whistle Communications, Inc.
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* All rights reserved.
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* Author: Archie Cobbs <archie@freebsd.org>
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*
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* Subject to the following obligations and disclaimer of warranty, use and
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* redistribution of this software, in source or object code forms, with or
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* without modifications are expressly permitted by Whistle Communications;
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* provided, however, that:
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* 1. Any and all reproductions of the source or object code must include the
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* copyright notice above and the following disclaimer of warranties; and
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* 2. No rights are granted, in any manner or form, to use Whistle
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* Communications, Inc. trademarks, including the mark "WHISTLE
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* COMMUNICATIONS" on advertising, endorsements, or otherwise except as
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* such appears in the above copyright notice or in the software.
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*
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* THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO
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* REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE,
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* INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
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* WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY
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* REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS
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* SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE.
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* IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES
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* RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING
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* WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
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* PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
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* OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Support for the SMBus controller logical device which is part of the
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* Intel 81801AA/AB/BA/CA/DC/EB (ICH/ICH[02345]) I/O controller hub chips.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/errno.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/syslog.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/smbus/smbconf.h>
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#include <dev/ichsmb/ichsmb_var.h>
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#include <dev/ichsmb/ichsmb_reg.h>
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/* PCI unique identifiers */
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#define PCI_VENDOR_INTEL 0x8086
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#define ID_82801AA 0x2413
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#define ID_82801AB 0x2423
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#define ID_82801BA 0x2443
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#define ID_82801CA 0x2483
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#define ID_82801DC 0x24C3
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#define ID_82801EB 0x24D3
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#define ID_82801FB 0x266A
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#define ID_82801GB 0x27da
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#define ID_82801H 0x283e
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#define ID_82801I 0x2930
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#define ID_EP80579 0x5032
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#define ID_82801JI 0x3a30
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#define ID_82801JD 0x3a60
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#define ID_PCH 0x3b30
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#define ID_6300ESB 0x25a4
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#define ID_631xESB 0x269b
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#define ID_DH89XXCC 0x2330
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#define ID_PATSBURG 0x1d22
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#define ID_CPT 0x1c22
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#define ID_PPT 0x1e22
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#define ID_AVOTON 0x1f3c
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#define ID_COLETOCRK 0x23B0
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#define ID_LPT 0x8c22
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#define ID_LPTLP 0x9c22
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#define ID_WCPT 0x8ca2
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#define ID_WCPTLP 0x9ca2
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#define ID_BAYTRAIL 0x0f12
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#define ID_BRASWELL 0x2292
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#define ID_WELLSBURG 0x8d22
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#define ID_SRPT 0xa123
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#define ID_SRPTLP 0x9d23
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#define ID_DENVERTON 0x19df
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#define ID_BROXTON 0x5ad4
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#define ID_LEWISBURG 0xa1a3
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#define ID_LEWISBURG2 0xa223
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#define ID_KABYLAKE 0xa2a3
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#define ID_CANNONLAKE 0xa323
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static const struct ichsmb_device {
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uint16_t id;
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const char *name;
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} ichsmb_devices[] = {
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{ ID_82801AA, "Intel 82801AA (ICH) SMBus controller" },
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{ ID_82801AB, "Intel 82801AB (ICH0) SMBus controller" },
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{ ID_82801BA, "Intel 82801BA (ICH2) SMBus controller" },
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{ ID_82801CA, "Intel 82801CA (ICH3) SMBus controller" },
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{ ID_82801DC, "Intel 82801DC (ICH4) SMBus controller" },
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{ ID_82801EB, "Intel 82801EB (ICH5) SMBus controller" },
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{ ID_82801FB, "Intel 82801FB (ICH6) SMBus controller" },
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{ ID_82801GB, "Intel 82801GB (ICH7) SMBus controller" },
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{ ID_82801H, "Intel 82801H (ICH8) SMBus controller" },
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{ ID_82801I, "Intel 82801I (ICH9) SMBus controller" },
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{ ID_82801GB, "Intel 82801GB (ICH7) SMBus controller" },
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{ ID_82801H, "Intel 82801H (ICH8) SMBus controller" },
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{ ID_82801I, "Intel 82801I (ICH9) SMBus controller" },
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{ ID_EP80579, "Intel EP80579 SMBus controller" },
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{ ID_82801JI, "Intel 82801JI (ICH10) SMBus controller" },
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{ ID_82801JD, "Intel 82801JD (ICH10) SMBus controller" },
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{ ID_PCH, "Intel PCH SMBus controller" },
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{ ID_6300ESB, "Intel 6300ESB (ICH) SMBus controller" },
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{ ID_631xESB, "Intel 631xESB/6321ESB (ESB2) SMBus controller" },
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{ ID_DH89XXCC, "Intel DH89xxCC SMBus controller" },
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{ ID_PATSBURG, "Intel Patsburg SMBus controller" },
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{ ID_CPT, "Intel Cougar Point SMBus controller" },
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{ ID_PPT, "Intel Panther Point SMBus controller" },
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{ ID_AVOTON, "Intel Avoton SMBus controller" },
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{ ID_LPT, "Intel Lynx Point SMBus controller" },
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{ ID_LPTLP, "Intel Lynx Point-LP SMBus controller" },
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{ ID_WCPT, "Intel Wildcat Point SMBus controller" },
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{ ID_WCPTLP, "Intel Wildcat Point-LP SMBus controller" },
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{ ID_BAYTRAIL, "Intel Baytrail SMBus controller" },
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{ ID_BRASWELL, "Intel Braswell SMBus controller" },
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{ ID_COLETOCRK, "Intel Coleto Creek SMBus controller" },
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{ ID_WELLSBURG, "Intel Wellsburg SMBus controller" },
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{ ID_SRPT, "Intel Sunrise Point-H SMBus controller" },
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{ ID_SRPTLP, "Intel Sunrise Point-LP SMBus controller" },
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{ ID_DENVERTON, "Intel Denverton SMBus controller" },
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{ ID_BROXTON, "Intel Broxton SMBus controller" },
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{ ID_LEWISBURG, "Intel Lewisburg SMBus controller" },
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{ ID_LEWISBURG2,"Intel Lewisburg SMBus controller" },
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{ ID_KABYLAKE, "Intel Kaby Lake SMBus controller" },
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{ ID_CANNONLAKE,"Intel Cannon Lake SMBus controller" },
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{ 0, NULL },
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};
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/* Internal functions */
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static int ichsmb_pci_probe(device_t dev);
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static int ichsmb_pci_attach(device_t dev);
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/*Use generic one for now*/
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#if 0
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static int ichsmb_pci_detach(device_t dev);
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#endif
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/* Device methods */
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static device_method_t ichsmb_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ichsmb_pci_probe),
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DEVMETHOD(device_attach, ichsmb_pci_attach),
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DEVMETHOD(device_detach, ichsmb_detach),
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/* SMBus methods */
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DEVMETHOD(smbus_callback, ichsmb_callback),
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DEVMETHOD(smbus_quick, ichsmb_quick),
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DEVMETHOD(smbus_sendb, ichsmb_sendb),
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DEVMETHOD(smbus_recvb, ichsmb_recvb),
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DEVMETHOD(smbus_writeb, ichsmb_writeb),
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DEVMETHOD(smbus_writew, ichsmb_writew),
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DEVMETHOD(smbus_readb, ichsmb_readb),
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DEVMETHOD(smbus_readw, ichsmb_readw),
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DEVMETHOD(smbus_pcall, ichsmb_pcall),
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DEVMETHOD(smbus_bwrite, ichsmb_bwrite),
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DEVMETHOD(smbus_bread, ichsmb_bread),
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DEVMETHOD_END
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};
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static driver_t ichsmb_pci_driver = {
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"ichsmb",
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ichsmb_pci_methods,
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sizeof(struct ichsmb_softc)
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};
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static devclass_t ichsmb_pci_devclass;
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DRIVER_MODULE(ichsmb, pci, ichsmb_pci_driver, ichsmb_pci_devclass, 0, 0);
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static int
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ichsmb_pci_probe(device_t dev)
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{
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const struct ichsmb_device *device;
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if (pci_get_vendor(dev) != PCI_VENDOR_INTEL)
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return (ENXIO);
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for (device = ichsmb_devices; device->name != NULL; device++) {
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if (pci_get_device(dev) == device->id) {
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device_set_desc(dev, device->name);
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return (ichsmb_probe(dev));
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}
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}
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return (ENXIO);
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}
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static int
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ichsmb_pci_attach(device_t dev)
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{
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const sc_p sc = device_get_softc(dev);
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int error;
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/* Initialize private state */
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bzero(sc, sizeof(*sc));
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sc->ich_cmd = -1;
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sc->dev = dev;
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/* Allocate an I/O range */
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sc->io_rid = ICH_SMB_BASE;
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sc->io_res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT,
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&sc->io_rid, 16, RF_ACTIVE);
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if (sc->io_res == NULL)
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sc->io_res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT,
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&sc->io_rid, 32, RF_ACTIVE);
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if (sc->io_res == NULL) {
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device_printf(dev, "can't map I/O\n");
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error = ENXIO;
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goto fail;
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}
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/* Allocate interrupt */
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sc->irq_rid = 0;
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sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&sc->irq_rid, RF_ACTIVE | RF_SHAREABLE);
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if (sc->irq_res == NULL) {
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device_printf(dev, "can't get IRQ\n");
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error = ENXIO;
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goto fail;
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}
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/* Enable device */
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pci_write_config(dev, ICH_HOSTC, ICH_HOSTC_HST_EN, 1);
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/* Done */
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error = ichsmb_attach(dev);
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if (error)
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goto fail;
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return (0);
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fail:
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/* Attach failed, release resources */
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ichsmb_release_resources(sc);
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return (error);
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}
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MODULE_DEPEND(ichsmb, pci, 1, 1, 1);
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MODULE_DEPEND(ichsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
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MODULE_VERSION(ichsmb, 1);
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