ed95805e90
remains. Xen is planning to phase out support for PV upstream since it is harder to maintain and has more overhead. Modern x86 CPUs include virtualization extensions that support HVM guests instead of PV guests. In addition, the PV code was i386 only and not as well maintained recently as the HVM code. - Remove the i386-only NATIVE option that was used to disable certain components for PV kernels. These components are now standard as they are on amd64. - Remove !XENHVM bits from PV drivers. - Remove various shims required for XEN (e.g. PT_UPDATES_FLUSH, LOAD_CR3, etc.) - Remove duplicate copy of <xen/features.h>. - Remove unused, i386-only xenstored.h. Differential Revision: https://reviews.freebsd.org/D2362 Reviewed by: royger Tested by: royger (i386/amd64 HVM domU and amd64 PVH dom0) Relnotes: yes
280 lines
11 KiB
C
280 lines
11 KiB
C
/*-
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* Copyright (c) 1989, 1990 William F. Jolitz
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)segments.h 7.1 (Berkeley) 5/9/91
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* $FreeBSD$
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*/
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#ifndef _X86_SEGMENTS_H_
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#define _X86_SEGMENTS_H_
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/*
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* X86 Segmentation Data Structures and definitions
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*/
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/*
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* Selectors
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*/
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#define SEL_RPL_MASK 3 /* requester priv level */
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#define ISPL(s) ((s)&3) /* priority level of a selector */
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#define SEL_KPL 0 /* kernel priority level */
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#define SEL_UPL 3 /* user priority level */
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#define ISLDT(s) ((s)&SEL_LDT) /* is it local or global */
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#define SEL_LDT 4 /* local descriptor table */
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#define IDXSEL(s) (((s)>>3) & 0x1fff) /* index of selector */
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#define LSEL(s,r) (((s)<<3) | SEL_LDT | r) /* a local selector */
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#define GSEL(s,r) (((s)<<3) | r) /* a global selector */
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/*
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* User segment descriptors (%cs, %ds etc for i386 apps. 64 bit wide)
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* For long-mode apps, %cs only has the conforming bit in sd_type, the sd_dpl,
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* sd_p, sd_l and sd_def32 which must be zero). %ds only has sd_p.
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*/
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struct segment_descriptor {
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unsigned sd_lolimit:16; /* segment extent (lsb) */
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unsigned sd_lobase:24; /* segment base address (lsb) */
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unsigned sd_type:5; /* segment type */
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unsigned sd_dpl:2; /* segment descriptor priority level */
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unsigned sd_p:1; /* segment descriptor present */
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unsigned sd_hilimit:4; /* segment extent (msb) */
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unsigned sd_xx:2; /* unused */
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unsigned sd_def32:1; /* default 32 vs 16 bit size */
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unsigned sd_gran:1; /* limit granularity (byte/page units)*/
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unsigned sd_hibase:8; /* segment base address (msb) */
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} __packed;
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struct user_segment_descriptor {
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unsigned sd_lolimit:16; /* segment extent (lsb) */
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unsigned sd_lobase:24; /* segment base address (lsb) */
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unsigned sd_type:5; /* segment type */
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unsigned sd_dpl:2; /* segment descriptor priority level */
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unsigned sd_p:1; /* segment descriptor present */
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unsigned sd_hilimit:4; /* segment extent (msb) */
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unsigned sd_xx:1; /* unused */
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unsigned sd_long:1; /* long mode (cs only) */
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unsigned sd_def32:1; /* default 32 vs 16 bit size */
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unsigned sd_gran:1; /* limit granularity (byte/page units)*/
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unsigned sd_hibase:8; /* segment base address (msb) */
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} __packed;
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#define USD_GETBASE(sd) (((sd)->sd_lobase) | (sd)->sd_hibase << 24)
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#define USD_SETBASE(sd, b) (sd)->sd_lobase = (b); \
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(sd)->sd_hibase = ((b) >> 24);
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#define USD_GETLIMIT(sd) (((sd)->sd_lolimit) | (sd)->sd_hilimit << 16)
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#define USD_SETLIMIT(sd, l) (sd)->sd_lolimit = (l); \
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(sd)->sd_hilimit = ((l) >> 16);
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#ifdef __i386__
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/*
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* Gate descriptors (e.g. indirect descriptors)
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*/
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struct gate_descriptor {
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unsigned gd_looffset:16; /* gate offset (lsb) */
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unsigned gd_selector:16; /* gate segment selector */
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unsigned gd_stkcpy:5; /* number of stack wds to cpy */
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unsigned gd_xx:3; /* unused */
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unsigned gd_type:5; /* segment type */
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unsigned gd_dpl:2; /* segment descriptor priority level */
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unsigned gd_p:1; /* segment descriptor present */
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unsigned gd_hioffset:16; /* gate offset (msb) */
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} __packed;
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/*
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* Generic descriptor
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*/
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union descriptor {
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struct segment_descriptor sd;
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struct gate_descriptor gd;
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};
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#else
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/*
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* Gate descriptors (e.g. indirect descriptors, trap, interrupt etc. 128 bit)
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* Only interrupt and trap gates have gd_ist.
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*/
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struct gate_descriptor {
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uint64_t gd_looffset:16; /* gate offset (lsb) */
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uint64_t gd_selector:16; /* gate segment selector */
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uint64_t gd_ist:3; /* IST table index */
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uint64_t gd_xx:5; /* unused */
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uint64_t gd_type:5; /* segment type */
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uint64_t gd_dpl:2; /* segment descriptor priority level */
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uint64_t gd_p:1; /* segment descriptor present */
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uint64_t gd_hioffset:48; /* gate offset (msb) */
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uint64_t sd_xx1:32;
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} __packed;
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/*
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* Generic descriptor
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*/
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union descriptor {
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struct user_segment_descriptor sd;
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struct gate_descriptor gd;
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};
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#endif
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/* system segments and gate types */
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#define SDT_SYSNULL 0 /* system null */
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#define SDT_SYS286TSS 1 /* system 286 TSS available */
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#define SDT_SYSLDT 2 /* system local descriptor table */
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#define SDT_SYS286BSY 3 /* system 286 TSS busy */
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#define SDT_SYS286CGT 4 /* system 286 call gate */
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#define SDT_SYSTASKGT 5 /* system task gate */
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#define SDT_SYS286IGT 6 /* system 286 interrupt gate */
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#define SDT_SYS286TGT 7 /* system 286 trap gate */
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#define SDT_SYSNULL2 8 /* system null again */
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#define SDT_SYS386TSS 9 /* system 386 TSS available */
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#define SDT_SYSTSS 9 /* system available 64 bit TSS */
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#define SDT_SYSNULL3 10 /* system null again */
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#define SDT_SYS386BSY 11 /* system 386 TSS busy */
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#define SDT_SYSBSY 11 /* system busy 64 bit TSS */
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#define SDT_SYS386CGT 12 /* system 386 call gate */
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#define SDT_SYSCGT 12 /* system 64 bit call gate */
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#define SDT_SYSNULL4 13 /* system null again */
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#define SDT_SYS386IGT 14 /* system 386 interrupt gate */
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#define SDT_SYSIGT 14 /* system 64 bit interrupt gate */
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#define SDT_SYS386TGT 15 /* system 386 trap gate */
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#define SDT_SYSTGT 15 /* system 64 bit trap gate */
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/* memory segment types */
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#define SDT_MEMRO 16 /* memory read only */
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#define SDT_MEMROA 17 /* memory read only accessed */
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#define SDT_MEMRW 18 /* memory read write */
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#define SDT_MEMRWA 19 /* memory read write accessed */
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#define SDT_MEMROD 20 /* memory read only expand dwn limit */
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#define SDT_MEMRODA 21 /* memory read only expand dwn limit accessed */
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#define SDT_MEMRWD 22 /* memory read write expand dwn limit */
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#define SDT_MEMRWDA 23 /* memory read write expand dwn limit accessed*/
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#define SDT_MEME 24 /* memory execute only */
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#define SDT_MEMEA 25 /* memory execute only accessed */
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#define SDT_MEMER 26 /* memory execute read */
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#define SDT_MEMERA 27 /* memory execute read accessed */
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#define SDT_MEMEC 28 /* memory execute only conforming */
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#define SDT_MEMEAC 29 /* memory execute only accessed conforming */
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#define SDT_MEMERC 30 /* memory execute read conforming */
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#define SDT_MEMERAC 31 /* memory execute read accessed conforming */
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/*
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* Size of IDT table
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*/
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#define NIDT 256 /* 32 reserved, 0x80 syscall, most are h/w */
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#define NRSVIDT 32 /* reserved entries for cpu exceptions */
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/*
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* Entries in the Interrupt Descriptor Table (IDT)
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*/
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#define IDT_DE 0 /* #DE: Divide Error */
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#define IDT_DB 1 /* #DB: Debug */
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#define IDT_NMI 2 /* Nonmaskable External Interrupt */
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#define IDT_BP 3 /* #BP: Breakpoint */
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#define IDT_OF 4 /* #OF: Overflow */
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#define IDT_BR 5 /* #BR: Bound Range Exceeded */
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#define IDT_UD 6 /* #UD: Undefined/Invalid Opcode */
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#define IDT_NM 7 /* #NM: No Math Coprocessor */
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#define IDT_DF 8 /* #DF: Double Fault */
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#define IDT_FPUGP 9 /* Coprocessor Segment Overrun */
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#define IDT_TS 10 /* #TS: Invalid TSS */
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#define IDT_NP 11 /* #NP: Segment Not Present */
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#define IDT_SS 12 /* #SS: Stack Segment Fault */
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#define IDT_GP 13 /* #GP: General Protection Fault */
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#define IDT_PF 14 /* #PF: Page Fault */
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#define IDT_MF 16 /* #MF: FPU Floating-Point Error */
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#define IDT_AC 17 /* #AC: Alignment Check */
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#define IDT_MC 18 /* #MC: Machine Check */
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#define IDT_XF 19 /* #XF: SIMD Floating-Point Exception */
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#define IDT_IO_INTS NRSVIDT /* Base of IDT entries for I/O interrupts. */
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#define IDT_SYSCALL 0x80 /* System Call Interrupt Vector */
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#define IDT_DTRACE_RET 0x92 /* DTrace pid provider Interrupt Vector */
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#define IDT_EVTCHN 0x93 /* Xen HVM Event Channel Interrupt Vector */
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#if defined(__i386__)
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/*
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* Entries in the Global Descriptor Table (GDT)
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* Note that each 4 entries share a single 32 byte L1 cache line.
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* Some of the fast syscall instructions require a specific order here.
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*/
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#define GNULL_SEL 0 /* Null Descriptor */
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#define GPRIV_SEL 1 /* SMP Per-Processor Private Data */
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#define GUFS_SEL 2 /* User %fs Descriptor (order critical: 1) */
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#define GUGS_SEL 3 /* User %gs Descriptor (order critical: 2) */
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#define GCODE_SEL 4 /* Kernel Code Descriptor (order critical: 1) */
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#define GDATA_SEL 5 /* Kernel Data Descriptor (order critical: 2) */
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#define GUCODE_SEL 6 /* User Code Descriptor (order critical: 3) */
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#define GUDATA_SEL 7 /* User Data Descriptor (order critical: 4) */
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#define GBIOSLOWMEM_SEL 8 /* BIOS low memory access (must be entry 8) */
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#define GPROC0_SEL 9 /* Task state process slot zero and up */
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#define GLDT_SEL 10 /* Default User LDT */
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#define GUSERLDT_SEL 11 /* User LDT */
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#define GPANIC_SEL 12 /* Task state to consider panic from */
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#define GBIOSCODE32_SEL 13 /* BIOS interface (32bit Code) */
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#define GBIOSCODE16_SEL 14 /* BIOS interface (16bit Code) */
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#define GBIOSDATA_SEL 15 /* BIOS interface (Data) */
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#define GBIOSUTIL_SEL 16 /* BIOS interface (Utility) */
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#define GBIOSARGS_SEL 17 /* BIOS interface (Arguments) */
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#define GNDIS_SEL 18 /* For the NDIS layer */
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#define NGDT 19
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/*
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* Entries in the Local Descriptor Table (LDT)
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*/
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#define LSYS5CALLS_SEL 0 /* forced by intel BCS */
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#define LSYS5SIGR_SEL 1
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#define L43BSDCALLS_SEL 2 /* notyet */
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#define LUCODE_SEL 3
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#define LSOL26CALLS_SEL 4 /* Solaris >= 2.6 system call gate */
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#define LUDATA_SEL 5
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/* separate stack, es,fs,gs sels ? */
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/* #define LPOSIXCALLS_SEL 5*/ /* notyet */
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#define LBSDICALLS_SEL 16 /* BSDI system call gate */
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#define NLDT (LBSDICALLS_SEL + 1)
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#else /* !__i386__ */
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/*
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* Entries in the Global Descriptor Table (GDT)
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*/
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#define GNULL_SEL 0 /* Null Descriptor */
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#define GNULL2_SEL 1 /* Null Descriptor */
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#define GUFS32_SEL 2 /* User 32 bit %fs Descriptor */
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#define GUGS32_SEL 3 /* User 32 bit %gs Descriptor */
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#define GCODE_SEL 4 /* Kernel Code Descriptor */
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#define GDATA_SEL 5 /* Kernel Data Descriptor */
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#define GUCODE32_SEL 6 /* User 32 bit code Descriptor */
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#define GUDATA_SEL 7 /* User 32/64 bit Data Descriptor */
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#define GUCODE_SEL 8 /* User 64 bit Code Descriptor */
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#define GPROC0_SEL 9 /* TSS for entering kernel etc */
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/* slot 10 is second half of GPROC0_SEL */
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#define GUSERLDT_SEL 11 /* LDT */
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/* slot 12 is second half of GUSERLDT_SEL */
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#define NGDT 13
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#endif /* __i386__ */
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#endif /* !_X86_SEGMENTS_H_ */
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