455fa6518a
This update brings few features:
o Support for the setmaster/dropmaster ioctls. For instance, they
are used to run multiple X servers simultaneously.
o Support for minor devices. The only user-visible change is a new
entry in /dev/dri but it is useless at the moment. This is a
first step to support render nodes [1].
The main benefit is to greatly reduce the diff with Linux (at the
expense of an unreadable commit diff). Hopefully, next upgrades will be
easier.
No updates were made to the drivers, beside adapting them to API
changes.
[1] https://en.wikipedia.org/wiki/Direct_Rendering_Manager#Render_nodes
Tested by: Many people
MFC after: 1 month
Relnotes: yes
659 lines
18 KiB
C
659 lines
18 KiB
C
/*
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* Copyright 2008 Jerome Glisse.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Jerome Glisse <glisse@freedesktop.org>
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <dev/drm2/drmP.h>
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#include <dev/drm2/radeon/radeon_drm.h>
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#include "radeon_reg.h"
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#include "radeon.h"
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void r100_cs_dump_packet(struct radeon_cs_parser *p,
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struct radeon_cs_packet *pkt);
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static int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
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{
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struct drm_device *ddev = p->rdev->ddev;
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struct radeon_cs_chunk *chunk;
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unsigned i, j;
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bool duplicate;
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if (p->chunk_relocs_idx == -1) {
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return 0;
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}
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chunk = &p->chunks[p->chunk_relocs_idx];
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p->dma_reloc_idx = 0;
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/* FIXME: we assume that each relocs use 4 dwords */
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p->nrelocs = chunk->length_dw / 4;
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p->relocs_ptr = malloc(p->nrelocs * sizeof(void *),
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DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
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if (p->relocs_ptr == NULL) {
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return -ENOMEM;
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}
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p->relocs = malloc(p->nrelocs * sizeof(struct radeon_cs_reloc),
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DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
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if (p->relocs == NULL) {
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return -ENOMEM;
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}
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for (i = 0; i < p->nrelocs; i++) {
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struct drm_radeon_cs_reloc *r;
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duplicate = false;
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r = (struct drm_radeon_cs_reloc *)&chunk->kdata[i*4];
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for (j = 0; j < i; j++) {
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if (r->handle == p->relocs[j].handle) {
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p->relocs_ptr[i] = &p->relocs[j];
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duplicate = true;
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break;
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}
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}
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if (!duplicate) {
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p->relocs[i].gobj = drm_gem_object_lookup(ddev,
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p->filp,
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r->handle);
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if (p->relocs[i].gobj == NULL) {
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DRM_ERROR("gem object lookup failed 0x%x\n",
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r->handle);
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return -ENOENT;
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}
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p->relocs_ptr[i] = &p->relocs[i];
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p->relocs[i].robj = gem_to_radeon_bo(p->relocs[i].gobj);
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p->relocs[i].lobj.bo = p->relocs[i].robj;
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p->relocs[i].lobj.wdomain = r->write_domain;
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p->relocs[i].lobj.rdomain = r->read_domains;
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p->relocs[i].lobj.tv.bo = &p->relocs[i].robj->tbo;
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p->relocs[i].handle = r->handle;
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p->relocs[i].flags = r->flags;
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radeon_bo_list_add_object(&p->relocs[i].lobj,
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&p->validated);
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} else
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p->relocs[i].handle = 0;
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}
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return radeon_bo_list_validate(&p->validated);
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}
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static int radeon_cs_get_ring(struct radeon_cs_parser *p, u32 ring, s32 priority)
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{
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p->priority = priority;
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switch (ring) {
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default:
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DRM_ERROR("unknown ring id: %d\n", ring);
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return -EINVAL;
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case RADEON_CS_RING_GFX:
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p->ring = RADEON_RING_TYPE_GFX_INDEX;
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break;
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case RADEON_CS_RING_COMPUTE:
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if (p->rdev->family >= CHIP_TAHITI) {
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if (p->priority > 0)
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p->ring = CAYMAN_RING_TYPE_CP1_INDEX;
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else
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p->ring = CAYMAN_RING_TYPE_CP2_INDEX;
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} else
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p->ring = RADEON_RING_TYPE_GFX_INDEX;
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break;
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case RADEON_CS_RING_DMA:
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if (p->rdev->family >= CHIP_CAYMAN) {
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if (p->priority > 0)
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p->ring = R600_RING_TYPE_DMA_INDEX;
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else
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p->ring = CAYMAN_RING_TYPE_DMA1_INDEX;
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} else if (p->rdev->family >= CHIP_R600) {
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p->ring = R600_RING_TYPE_DMA_INDEX;
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} else {
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return -EINVAL;
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}
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break;
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}
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return 0;
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}
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static void radeon_cs_sync_to(struct radeon_cs_parser *p,
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struct radeon_fence *fence)
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{
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struct radeon_fence *other;
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if (!fence)
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return;
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other = p->ib.sync_to[fence->ring];
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p->ib.sync_to[fence->ring] = radeon_fence_later(fence, other);
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}
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static void radeon_cs_sync_rings(struct radeon_cs_parser *p)
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{
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int i;
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for (i = 0; i < p->nrelocs; i++) {
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if (!p->relocs[i].robj)
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continue;
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radeon_cs_sync_to(p, p->relocs[i].robj->tbo.sync_obj);
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}
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}
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/* XXX: note that this is called from the legacy UMS CS ioctl as well */
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int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)
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{
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struct drm_radeon_cs *cs = data;
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uint64_t *chunk_array_ptr;
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unsigned size, i;
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u32 ring = RADEON_CS_RING_GFX;
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s32 priority = 0;
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if (!cs->num_chunks) {
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return 0;
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}
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/* get chunks */
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INIT_LIST_HEAD(&p->validated);
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p->idx = 0;
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p->ib.sa_bo = NULL;
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p->ib.semaphore = NULL;
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p->const_ib.sa_bo = NULL;
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p->const_ib.semaphore = NULL;
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p->chunk_ib_idx = -1;
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p->chunk_relocs_idx = -1;
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p->chunk_flags_idx = -1;
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p->chunk_const_ib_idx = -1;
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p->chunks_array = malloc(cs->num_chunks * sizeof(uint64_t),
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DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
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if (p->chunks_array == NULL) {
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return -ENOMEM;
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}
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chunk_array_ptr = (uint64_t *)(unsigned long)(cs->chunks);
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if (DRM_COPY_FROM_USER(p->chunks_array, chunk_array_ptr,
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sizeof(uint64_t)*cs->num_chunks)) {
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return -EFAULT;
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}
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p->cs_flags = 0;
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p->nchunks = cs->num_chunks;
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p->chunks = malloc(p->nchunks * sizeof(struct radeon_cs_chunk),
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DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
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if (p->chunks == NULL) {
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return -ENOMEM;
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}
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for (i = 0; i < p->nchunks; i++) {
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struct drm_radeon_cs_chunk __user **chunk_ptr = NULL;
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struct drm_radeon_cs_chunk user_chunk;
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uint32_t __user *cdata;
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chunk_ptr = (void __user*)(unsigned long)p->chunks_array[i];
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if (DRM_COPY_FROM_USER(&user_chunk, chunk_ptr,
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sizeof(struct drm_radeon_cs_chunk))) {
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return -EFAULT;
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}
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p->chunks[i].length_dw = user_chunk.length_dw;
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p->chunks[i].kdata = NULL;
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p->chunks[i].chunk_id = user_chunk.chunk_id;
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if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) {
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p->chunk_relocs_idx = i;
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}
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if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_IB) {
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p->chunk_ib_idx = i;
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/* zero length IB isn't useful */
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if (p->chunks[i].length_dw == 0)
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return -EINVAL;
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}
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if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_CONST_IB) {
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p->chunk_const_ib_idx = i;
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/* zero length CONST IB isn't useful */
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if (p->chunks[i].length_dw == 0)
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return -EINVAL;
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}
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if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) {
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p->chunk_flags_idx = i;
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/* zero length flags aren't useful */
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if (p->chunks[i].length_dw == 0)
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return -EINVAL;
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}
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p->chunks[i].length_dw = user_chunk.length_dw;
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p->chunks[i].user_ptr = (void __user *)(unsigned long)user_chunk.chunk_data;
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cdata = (uint32_t *)(unsigned long)user_chunk.chunk_data;
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if ((p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) ||
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(p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS)) {
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size = p->chunks[i].length_dw * sizeof(uint32_t);
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p->chunks[i].kdata = malloc(size, DRM_MEM_DRIVER, M_NOWAIT);
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if (p->chunks[i].kdata == NULL) {
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return -ENOMEM;
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}
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if (DRM_COPY_FROM_USER(p->chunks[i].kdata,
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p->chunks[i].user_ptr, size)) {
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return -EFAULT;
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}
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if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) {
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p->cs_flags = p->chunks[i].kdata[0];
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if (p->chunks[i].length_dw > 1)
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ring = p->chunks[i].kdata[1];
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if (p->chunks[i].length_dw > 2)
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priority = (s32)p->chunks[i].kdata[2];
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}
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}
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}
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/* these are KMS only */
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if (p->rdev) {
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if ((p->cs_flags & RADEON_CS_USE_VM) &&
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!p->rdev->vm_manager.enabled) {
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DRM_ERROR("VM not active on asic!\n");
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return -EINVAL;
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}
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/* we only support VM on SI+ */
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if ((p->rdev->family >= CHIP_TAHITI) &&
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((p->cs_flags & RADEON_CS_USE_VM) == 0)) {
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DRM_ERROR("VM required on SI+!\n");
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return -EINVAL;
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}
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if (radeon_cs_get_ring(p, ring, priority))
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return -EINVAL;
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}
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/* deal with non-vm */
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if ((p->chunk_ib_idx != -1) &&
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((p->cs_flags & RADEON_CS_USE_VM) == 0) &&
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(p->chunks[p->chunk_ib_idx].chunk_id == RADEON_CHUNK_ID_IB)) {
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if (p->chunks[p->chunk_ib_idx].length_dw > (16 * 1024)) {
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DRM_ERROR("cs IB too big: %d\n",
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p->chunks[p->chunk_ib_idx].length_dw);
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return -EINVAL;
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}
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if (p->rdev && (p->rdev->flags & RADEON_IS_AGP)) {
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p->chunks[p->chunk_ib_idx].kpage[0] = malloc(PAGE_SIZE, DRM_MEM_DRIVER, M_NOWAIT);
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p->chunks[p->chunk_ib_idx].kpage[1] = malloc(PAGE_SIZE, DRM_MEM_DRIVER, M_NOWAIT);
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if (p->chunks[p->chunk_ib_idx].kpage[0] == NULL ||
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p->chunks[p->chunk_ib_idx].kpage[1] == NULL) {
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free(p->chunks[p->chunk_ib_idx].kpage[0], DRM_MEM_DRIVER);
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free(p->chunks[p->chunk_ib_idx].kpage[1], DRM_MEM_DRIVER);
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p->chunks[p->chunk_ib_idx].kpage[0] = NULL;
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p->chunks[p->chunk_ib_idx].kpage[1] = NULL;
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return -ENOMEM;
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}
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}
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p->chunks[p->chunk_ib_idx].kpage_idx[0] = -1;
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p->chunks[p->chunk_ib_idx].kpage_idx[1] = -1;
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p->chunks[p->chunk_ib_idx].last_copied_page = -1;
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p->chunks[p->chunk_ib_idx].last_page_index =
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((p->chunks[p->chunk_ib_idx].length_dw * 4) - 1) / PAGE_SIZE;
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}
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return 0;
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}
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/**
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* cs_parser_fini() - clean parser states
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* @parser: parser structure holding parsing context.
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* @error: error number
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*
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* If error is set than unvalidate buffer, otherwise just free memory
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* used by parsing context.
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**/
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static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)
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{
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unsigned i;
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if (!error) {
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ttm_eu_fence_buffer_objects(&parser->validated,
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parser->ib.fence);
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} else {
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ttm_eu_backoff_reservation(&parser->validated);
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}
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if (parser->relocs != NULL) {
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for (i = 0; i < parser->nrelocs; i++) {
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if (parser->relocs[i].gobj)
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drm_gem_object_unreference_unlocked(parser->relocs[i].gobj);
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}
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}
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free(parser->track, DRM_MEM_DRIVER);
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free(parser->relocs, DRM_MEM_DRIVER);
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free(parser->relocs_ptr, DRM_MEM_DRIVER);
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for (i = 0; i < parser->nchunks; i++) {
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free(parser->chunks[i].kdata, DRM_MEM_DRIVER);
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if ((parser->rdev->flags & RADEON_IS_AGP)) {
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free(parser->chunks[i].kpage[0], DRM_MEM_DRIVER);
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free(parser->chunks[i].kpage[1], DRM_MEM_DRIVER);
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}
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}
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free(parser->chunks, DRM_MEM_DRIVER);
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free(parser->chunks_array, DRM_MEM_DRIVER);
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radeon_ib_free(parser->rdev, &parser->ib);
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radeon_ib_free(parser->rdev, &parser->const_ib);
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}
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static int radeon_cs_ib_chunk(struct radeon_device *rdev,
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struct radeon_cs_parser *parser)
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{
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struct radeon_cs_chunk *ib_chunk;
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int r;
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if (parser->chunk_ib_idx == -1)
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return 0;
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if (parser->cs_flags & RADEON_CS_USE_VM)
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return 0;
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ib_chunk = &parser->chunks[parser->chunk_ib_idx];
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/* Copy the packet into the IB, the parser will read from the
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* input memory (cached) and write to the IB (which can be
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* uncached).
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*/
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r = radeon_ib_get(rdev, parser->ring, &parser->ib,
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NULL, ib_chunk->length_dw * 4);
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if (r) {
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DRM_ERROR("Failed to get ib !\n");
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return r;
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}
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parser->ib.length_dw = ib_chunk->length_dw;
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r = radeon_cs_parse(rdev, parser->ring, parser);
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if (r || parser->parser_error) {
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DRM_ERROR("Invalid command stream !\n");
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return r;
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}
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r = radeon_cs_finish_pages(parser);
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if (r) {
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DRM_ERROR("Invalid command stream !\n");
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return r;
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}
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radeon_cs_sync_rings(parser);
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r = radeon_ib_schedule(rdev, &parser->ib, NULL);
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if (r) {
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DRM_ERROR("Failed to schedule IB !\n");
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}
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return r;
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}
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static int radeon_bo_vm_update_pte(struct radeon_cs_parser *parser,
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struct radeon_vm *vm)
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{
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struct radeon_device *rdev = parser->rdev;
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struct radeon_bo_list *lobj;
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struct radeon_bo *bo;
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int r;
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r = radeon_vm_bo_update_pte(rdev, vm, rdev->ring_tmp_bo.bo, &rdev->ring_tmp_bo.bo->tbo.mem);
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if (r) {
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return r;
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}
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list_for_each_entry(lobj, &parser->validated, tv.head) {
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bo = lobj->bo;
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r = radeon_vm_bo_update_pte(parser->rdev, vm, bo, &bo->tbo.mem);
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if (r) {
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return r;
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}
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}
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return 0;
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}
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static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,
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struct radeon_cs_parser *parser)
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{
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struct radeon_cs_chunk *ib_chunk;
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struct radeon_fpriv *fpriv = parser->filp->driver_priv;
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struct radeon_vm *vm = &fpriv->vm;
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int r;
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if (parser->chunk_ib_idx == -1)
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return 0;
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if ((parser->cs_flags & RADEON_CS_USE_VM) == 0)
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return 0;
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if ((rdev->family >= CHIP_TAHITI) &&
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(parser->chunk_const_ib_idx != -1)) {
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ib_chunk = &parser->chunks[parser->chunk_const_ib_idx];
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if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) {
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DRM_ERROR("cs IB CONST too big: %d\n", ib_chunk->length_dw);
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return -EINVAL;
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}
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r = radeon_ib_get(rdev, parser->ring, &parser->const_ib,
|
|
vm, ib_chunk->length_dw * 4);
|
|
if (r) {
|
|
DRM_ERROR("Failed to get const ib !\n");
|
|
return r;
|
|
}
|
|
parser->const_ib.is_const_ib = true;
|
|
parser->const_ib.length_dw = ib_chunk->length_dw;
|
|
/* Copy the packet into the IB */
|
|
if (DRM_COPY_FROM_USER(parser->const_ib.ptr, ib_chunk->user_ptr,
|
|
ib_chunk->length_dw * 4)) {
|
|
return -EFAULT;
|
|
}
|
|
r = radeon_ring_ib_parse(rdev, parser->ring, &parser->const_ib);
|
|
if (r) {
|
|
return r;
|
|
}
|
|
}
|
|
|
|
ib_chunk = &parser->chunks[parser->chunk_ib_idx];
|
|
if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) {
|
|
DRM_ERROR("cs IB too big: %d\n", ib_chunk->length_dw);
|
|
return -EINVAL;
|
|
}
|
|
r = radeon_ib_get(rdev, parser->ring, &parser->ib,
|
|
vm, ib_chunk->length_dw * 4);
|
|
if (r) {
|
|
DRM_ERROR("Failed to get ib !\n");
|
|
return r;
|
|
}
|
|
parser->ib.length_dw = ib_chunk->length_dw;
|
|
/* Copy the packet into the IB */
|
|
if (DRM_COPY_FROM_USER(parser->ib.ptr, ib_chunk->user_ptr,
|
|
ib_chunk->length_dw * 4)) {
|
|
return -EFAULT;
|
|
}
|
|
r = radeon_ring_ib_parse(rdev, parser->ring, &parser->ib);
|
|
if (r) {
|
|
return r;
|
|
}
|
|
|
|
sx_xlock(&rdev->vm_manager.lock);
|
|
sx_xlock(&vm->mutex);
|
|
r = radeon_vm_alloc_pt(rdev, vm);
|
|
if (r) {
|
|
goto out;
|
|
}
|
|
r = radeon_bo_vm_update_pte(parser, vm);
|
|
if (r) {
|
|
goto out;
|
|
}
|
|
radeon_cs_sync_rings(parser);
|
|
radeon_cs_sync_to(parser, vm->fence);
|
|
radeon_cs_sync_to(parser, radeon_vm_grab_id(rdev, vm, parser->ring));
|
|
|
|
if ((rdev->family >= CHIP_TAHITI) &&
|
|
(parser->chunk_const_ib_idx != -1)) {
|
|
r = radeon_ib_schedule(rdev, &parser->ib, &parser->const_ib);
|
|
} else {
|
|
r = radeon_ib_schedule(rdev, &parser->ib, NULL);
|
|
}
|
|
|
|
if (!r) {
|
|
radeon_vm_fence(rdev, vm, parser->ib.fence);
|
|
}
|
|
|
|
out:
|
|
radeon_vm_add_to_lru(rdev, vm);
|
|
sx_xunlock(&vm->mutex);
|
|
sx_xunlock(&rdev->vm_manager.lock);
|
|
return r;
|
|
}
|
|
|
|
static int radeon_cs_handle_lockup(struct radeon_device *rdev, int r)
|
|
{
|
|
if (r == -EDEADLK) {
|
|
r = radeon_gpu_reset(rdev);
|
|
if (!r)
|
|
r = -EAGAIN;
|
|
}
|
|
return r;
|
|
}
|
|
|
|
int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
|
|
{
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
struct radeon_cs_parser parser;
|
|
int r;
|
|
|
|
sx_slock(&rdev->exclusive_lock);
|
|
if (!rdev->accel_working) {
|
|
sx_sunlock(&rdev->exclusive_lock);
|
|
return -EBUSY;
|
|
}
|
|
/* initialize parser */
|
|
memset(&parser, 0, sizeof(struct radeon_cs_parser));
|
|
parser.filp = filp;
|
|
parser.rdev = rdev;
|
|
parser.dev = rdev->dev;
|
|
parser.family = rdev->family;
|
|
r = radeon_cs_parser_init(&parser, data);
|
|
if (r) {
|
|
DRM_ERROR("Failed to initialize parser !\n");
|
|
radeon_cs_parser_fini(&parser, r);
|
|
sx_sunlock(&rdev->exclusive_lock);
|
|
r = radeon_cs_handle_lockup(rdev, r);
|
|
return r;
|
|
}
|
|
r = radeon_cs_parser_relocs(&parser);
|
|
if (r) {
|
|
if (r != -ERESTARTSYS)
|
|
DRM_ERROR("Failed to parse relocation %d!\n", r);
|
|
radeon_cs_parser_fini(&parser, r);
|
|
sx_sunlock(&rdev->exclusive_lock);
|
|
r = radeon_cs_handle_lockup(rdev, r);
|
|
return r;
|
|
}
|
|
r = radeon_cs_ib_chunk(rdev, &parser);
|
|
if (r) {
|
|
goto out;
|
|
}
|
|
r = radeon_cs_ib_vm_chunk(rdev, &parser);
|
|
if (r) {
|
|
goto out;
|
|
}
|
|
out:
|
|
radeon_cs_parser_fini(&parser, r);
|
|
sx_sunlock(&rdev->exclusive_lock);
|
|
r = radeon_cs_handle_lockup(rdev, r);
|
|
return r;
|
|
}
|
|
|
|
int radeon_cs_finish_pages(struct radeon_cs_parser *p)
|
|
{
|
|
struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
|
|
int i;
|
|
int size = PAGE_SIZE;
|
|
|
|
for (i = ibc->last_copied_page + 1; i <= ibc->last_page_index; i++) {
|
|
if (i == ibc->last_page_index) {
|
|
size = (ibc->length_dw * 4) % PAGE_SIZE;
|
|
if (size == 0)
|
|
size = PAGE_SIZE;
|
|
}
|
|
|
|
if (DRM_COPY_FROM_USER(p->ib.ptr + (i * (PAGE_SIZE/4)),
|
|
(char *)ibc->user_ptr + (i * PAGE_SIZE),
|
|
size))
|
|
return -EFAULT;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx)
|
|
{
|
|
int new_page;
|
|
struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
|
|
int i;
|
|
int size = PAGE_SIZE;
|
|
bool copy1 = (p->rdev && (p->rdev->flags & RADEON_IS_AGP)) ?
|
|
false : true;
|
|
|
|
for (i = ibc->last_copied_page + 1; i < pg_idx; i++) {
|
|
if (DRM_COPY_FROM_USER(p->ib.ptr + (i * (PAGE_SIZE/4)),
|
|
(char *)ibc->user_ptr + (i * PAGE_SIZE),
|
|
PAGE_SIZE)) {
|
|
p->parser_error = -EFAULT;
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
if (pg_idx == ibc->last_page_index) {
|
|
size = (ibc->length_dw * 4) % PAGE_SIZE;
|
|
if (size == 0)
|
|
size = PAGE_SIZE;
|
|
}
|
|
|
|
new_page = ibc->kpage_idx[0] < ibc->kpage_idx[1] ? 0 : 1;
|
|
if (copy1)
|
|
ibc->kpage[new_page] = p->ib.ptr + (pg_idx * (PAGE_SIZE / 4));
|
|
|
|
if (DRM_COPY_FROM_USER(ibc->kpage[new_page],
|
|
(char *)ibc->user_ptr + (pg_idx * PAGE_SIZE),
|
|
size)) {
|
|
p->parser_error = -EFAULT;
|
|
return 0;
|
|
}
|
|
|
|
/* copy to IB for non single case */
|
|
if (!copy1)
|
|
memcpy((void *)(p->ib.ptr+(pg_idx*(PAGE_SIZE/4))), ibc->kpage[new_page], size);
|
|
|
|
ibc->last_copied_page = pg_idx;
|
|
ibc->kpage_idx[new_page] = pg_idx;
|
|
|
|
return new_page;
|
|
}
|
|
|
|
u32 radeon_get_ib_value(struct radeon_cs_parser *p, int idx)
|
|
{
|
|
struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
|
|
u32 pg_idx, pg_offset;
|
|
u32 idx_value = 0;
|
|
int new_page;
|
|
|
|
pg_idx = (idx * 4) / PAGE_SIZE;
|
|
pg_offset = (idx * 4) % PAGE_SIZE;
|
|
|
|
if (ibc->kpage_idx[0] == pg_idx)
|
|
return ibc->kpage[0][pg_offset/4];
|
|
if (ibc->kpage_idx[1] == pg_idx)
|
|
return ibc->kpage[1][pg_offset/4];
|
|
|
|
new_page = radeon_cs_update_pages(p, pg_idx);
|
|
if (new_page < 0) {
|
|
p->parser_error = new_page;
|
|
return 0;
|
|
}
|
|
|
|
idx_value = ibc->kpage[new_page][pg_offset/4];
|
|
return idx_value;
|
|
}
|