ed4e46bdce
result of a joined effort with parts contributed by Doug Rabson, Warner Losh and Stefan Esser (hope I did not forget anybody). Part of the sources is obtained from NetBSD with modifications. This code is work in progress: As of the time of the initial import, a loader.exe executable is built, which can be loaded on an Alpha with NT only firmware, but no attempt is made to switch to OSF PAL code as required to start an actual kernel.
96 lines
2.2 KiB
ArmAsm
96 lines
2.2 KiB
ArmAsm
/* $Id$ */
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/*
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* Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <machine/asm.h>
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.text
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/*
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* Kernel setjmp and longjmp. Rather minimalist.
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*
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* longjmp(label_t *a)
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* will generate a "return (1)" from the last call to
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* setjmp(label_t *a)
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* by restoring registers from the stack,
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*/
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.set noreorder
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LEAF(setjmp, 1)
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LDGP(pv)
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stq ra, (0 * 8)(a0) /* return address */
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stq s0, (1 * 8)(a0) /* callee-saved registers */
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stq s1, (2 * 8)(a0)
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stq s2, (3 * 8)(a0)
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stq s3, (4 * 8)(a0)
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stq s4, (5 * 8)(a0)
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stq s5, (6 * 8)(a0)
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stq s6, (7 * 8)(a0)
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stq sp, (8 * 8)(a0)
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ldiq t0, 0xbeeffedadeadbabe /* set magic number */
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stq t0, (9 * 8)(a0)
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mov zero, v0 /* return zero */
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RET
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END(setjmp)
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LEAF(longjmp, 1)
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LDGP(pv)
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ldiq t0, 0xbeeffedadeadbabe /* check magic number */
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ldq t1, (9 * 8)(a0)
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cmpeq t0, t1, t0
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beq t0, longjmp_botch /* if bad, punt */
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ldq ra, (0 * 8)(a0) /* return address */
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ldq s0, (1 * 8)(a0) /* callee-saved registers */
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ldq s1, (2 * 8)(a0)
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ldq s2, (3 * 8)(a0)
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ldq s3, (4 * 8)(a0)
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ldq s4, (5 * 8)(a0)
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ldq s5, (6 * 8)(a0)
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ldq s6, (7 * 8)(a0)
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ldq sp, (8 * 8)(a0)
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ldiq v0, 1
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RET
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longjmp_botch:
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lda a0, longjmp_botchmsg
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mov ra, a1
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CALL(panic)
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call_pal PAL_bugchk
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.data
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longjmp_botchmsg:
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.asciz "longjmp botch from %p"
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.text
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END(longjmp)
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