f57d04ab1d
register to the one of the processor doing the interrupt setup. This is required since this field is preinitialized to 0, but there exist machines which have no processor with a MID of 0 (e.g. e450s with 1 or 2 processors). Add some more macros for handle the interrupt mapping registers, and rename some existing ones for consistency. Approved by: re |
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compile | ||
conf | ||
ebus | ||
include | ||
isa | ||
pci | ||
sbus | ||
sparc64 |