9d52656a5a
functions switched to using {g|s}et_mcontext(). The problem is that
sigreturn(), being a syscall, can be given an async. context (i.e.
one corresponding to an interrupt or trap). When this happens, we
try to return to user mode via epc_syscall_return with a trapframe
that can only be used to return to user mode via exception_restore.
To fix this, we check the frame's flags immediately prior to
epc_syscall_return and branch to exception_restore for non-syscall
frames. Modify the assertion in set_mcontext() to check that if
there's a mismatch, it's because of sigreturn().
570 lines
9.0 KiB
ArmAsm
570 lines
9.0 KiB
ArmAsm
/*
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* Copyright (c) 2002, 2003 Marcel Moolenaar
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/syscall.h>
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#include <machine/asm.h>
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#include <assym.s>
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/*
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* A process performs a syscall by performing an indirect call to the
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* address stored in ar.k5. The contents of ar.pfs and rp should be
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* saved prior to the syscall in r9 and r10 respectively. The kernel
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* will restore these values on return. The value of gp is preserved
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* across the call. This allows for small enough syscall stubs without
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* getting too weird.
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* The address in ar.k5 is the start of the EPC gateway page and also
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* the syscall entry point. The syscall code in the gateway page is
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* primarily responsible for increasing the privilege level, but will
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* also make sure we have a reliable psr.
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*
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* A process defines:
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* r8 - syscall number
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* r9 - copy of ar.pfs
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* r10 - copy of rp
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* in0-in7 - syscall arguments
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*
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* A syscall returns:
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* r8+r9 - syscall return value(s)
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* r10 - syscall error flag
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* ar.pfs - restored from r9
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* rp - restored from r10
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* gp - preserved
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*
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* The EPC syscall code defines:
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* r11 - copy of psr.l
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* r14 - Kernel memory stack
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* r15 - Kernel register stack
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*
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* Also in the gateway page are the signal trampolines. As such, stacks
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* don't have to be made executable per se. Since debuggers have a need
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* to know about trampolines, we probably need to define a table of
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* vectors or something along those lines so that debuggers can get the
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* information they need and we have the freedom to move code around.
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*/
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.section .text.gateway, "ax"
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.align PAGE_SIZE
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.global ia64_gateway_page
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ia64_gateway_page:
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{ .mmb
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mov r14=ar.k7 // Memory stack
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mov r15=ar.k6 // Register stack
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epc
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;;
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}
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{ .mlx
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mov r11=psr
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movl r31=epc_syscall
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;;
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}
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{ .mib
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rum psr.be
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mov b7=r31
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br b7
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;;
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}
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gw_ret:
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{ .mmi
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mov ar.rnat=r22
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;;
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mov ar.rsc=r24
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mov ar.pfs=r20
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}
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{ .mib
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mov ar.fpsr=r25
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mov b0=r18
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br.sptk b6
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;;
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}
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gw_ret_ia32:
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{ .mfb
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flushrs
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nop 0
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nop 0
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;;
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}
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{ .mfb
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nop 0
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nop 0
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br.ia.sptk b6
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;;
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}
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ENTRY(break_sigtramp, 0)
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{ .mib
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mov ar.rsc=0
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cmp.ne p15,p0=0,gp
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cover
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;;
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}
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{ .mmi
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flushrs
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(p15) invala
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add r16=16+UC_MCONTEXT+MC_SPECIAL,sp
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;;
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}
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{ .mmi
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mov r17=ar.bsp
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mov r18=ar.rnat
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add r14=40,r16
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;;
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}
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{ .mmi
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st8 [r14]=r17,64 // bspstore
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(p15) mov ar.bspstore=gp
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add r15=48,r16
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;;
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}
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{ .mmi
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st8 [r15]=r18 // rnat
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st8 [r14]=r0 // ndirty
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nop 0
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;;
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}
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{ .mmi
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alloc r14=ar.pfs, 0, 0, 3, 0
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mov ar.rsc=15
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mov out0=r8
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;;
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}
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{ .mmi
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ld8 r16=[r10],8 // function address
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;;
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ld8 gp=[r10] // function's gp value
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mov b7=r16
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;;
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}
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{ .mib
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mov out1=r9
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add out2=16,sp
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br.call.sptk rp=b7
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;;
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}
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{ .mmi
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mov r15=SYS_sigreturn
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add out0=16,sp
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break 0x100000
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;;
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}
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{ .mmi
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mov r15=SYS_exit
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mov out0=ret0
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break 0x100000
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;;
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}
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END(break_sigtramp)
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ENTRY(epc_sigtramp, 0)
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{ .mmi
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ld8 r16=[r10],8 // function address
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mov ar.rsc=0
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cmp.ne p15,p0=0,gp
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;;
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}
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{ .mmi
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(p15) invala
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(p15) mov ar.bspstore=gp
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mov b7=r16
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;;
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}
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{ .mmb
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alloc r14=ar.pfs, 0, 0, 3, 0
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mov ar.rsc=15
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nop 0
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;;
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}
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{ .mii
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ld8 gp=[r10] // function's gp value
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mov out0=r8
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mov out1=r9
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}
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{ .mfb
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add out2=16,sp
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nop 0
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br.call.sptk rp=b7
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;;
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}
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add out0=16,sp
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CALLSYS_NOERROR(sigreturn)
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mov out0=ret0
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CALLSYS_NOERROR(exit)
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END(epc_sigtramp)
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.align PAGE_SIZE
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.text
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ENTRY(epc_syscall, 8)
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.prologue
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.unwabi @svr4, 'E'
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.save rp, r0
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.body
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{ .mmi
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mov r16=ar.rsc
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mov ar.rsc=0
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mov r17=r13
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;;
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}
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{ .mmi
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mov r18=ar.bspstore
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;;
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mov r19=ar.rnat
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dep r15=r18,r15,0,9
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;;
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}
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{ .mmi
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mov ar.bspstore=r15
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add r30=-SIZEOF_TRAPFRAME,r14
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mov r20=sp
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;;
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}
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{ .mii
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mov r13=ar.k4
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dep r30=0,r30,0,10
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;;
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add sp=-16,r30
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;;
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}
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{ .mib
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mov r21=ar.unat
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add r31=8,r30
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nop 0
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;;
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}
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{ .mib
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mov r22=ar.fpsr
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sub r29=r14,r30
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nop 0
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}
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{ .mmi
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mov r23=ar.bsp
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mov ar.rsc=3
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add r28=FRAME_SYSCALL,r0
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;;
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}
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{ .mmi
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st8 [r30]=r29,16 // tf_length
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st8 [r31]=r28,16 // tf_flags
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mov r24=rp
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;;
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}
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{ .mmi
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st8 [r30]=r20,16 // sp
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st8 [r31]=r21,16 // unat
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mov r25=pr
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;;
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}
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{ .mmi
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st8 [r30]=r10,16 // rp (syscall caller)
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st8 [r31]=r25,16 // pr
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mov r26=ar.pfs
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;;
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}
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{ .mmi
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st8 [r30]=r9,16 // pfs (syscall caller)
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st8 [r31]=r18,16 // bspstore
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sub r27=r23,r15
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;;
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}
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{ .mmi
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st8 [r30]=r19,16 // rnat
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st8 [r31]=r0,16 // __spare
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nop 0
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;;
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}
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{ .mmi
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st8 [r30]=r17,16 // tp
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st8 [r31]=r16,16 // rsc
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dep r11=-1,r11,32,2 // Set psr.cpl=3
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;;
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}
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{ .mmi
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st8 [r30]=r22,16 // fpsr
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st8 [r31]=r11,16 // psr
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nop 0
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;;
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}
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{ .mmi
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st8 [r30]=r1,16 // gp
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st8 [r31]=r27,16 // ndirty
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nop 0
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;;
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}
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{ .mmi
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st8 [r30]=r26,16 // pfs (syscall stub)
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st8 [r31]=r24,16 // rp (syscall stub)
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nop 0
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;;
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}
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{ .mmi
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st8 [r30]=r0,80 // ifa
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st8 [r31]=r0,80 // isr
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nop 0
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;;
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}
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{ .mmi
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alloc r14=ar.pfs,0,0,8,0
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st8 [r30]=r8,16 // syscall number (=r15)
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nop 0
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;;
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}
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{ .mmi
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.mem.offset 0,0
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st8.spill [r31]=r32,16 // arg0 (=r16)
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.mem.offset 8,0
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st8.spill [r30]=r33,16 // arg1 (=r17)
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nop 0
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;;
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}
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{ .mmi
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.mem.offset 16,0
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st8.spill [r31]=r34,16 // arg2 (=r18)
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.mem.offset 24,0
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st8.spill [r30]=r35,16 // arg3 (=r19)
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nop 0
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;;
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}
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{ .mmi
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.mem.offset 32,0
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st8.spill [r31]=r36,16 // arg4 (=r20)
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.mem.offset 40,0
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st8.spill [r30]=r37,16 // arg5 (=r21)
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nop 0
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;;
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}
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{ .mmi
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.mem.offset 48,0
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st8.spill [r31]=r38 // arg6 (=r22)
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.mem.offset 56,0
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st8.spill [r30]=r39 // arg7 (=r23)
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nop 0
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;;
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}
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{ .mlx
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ssm psr.dfh|psr.ac
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movl gp=__gp
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;;
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}
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1:
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{ .mib
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srlz.d
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add out0=16,sp
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br.call.sptk rp=syscall
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;;
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}
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{ .mfb
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add out0=16,sp
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nop 0
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br.call.sptk rp=do_ast
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;;
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}
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{ .mib
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cmp4.eq p15,p0=ERESTART,r8
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add r14=24,sp
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(p15) br.spnt 1b // restart syscall
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;;
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}
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{ .mfb
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ld8 r14=[r14] // tf_flags
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nop 0
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nop 0
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;;
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}
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{ .mib
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nop 0
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tbit.z p15,p0=r14,0
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(p15) br.spnt exception_restore
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;;
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}
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.global epc_syscall_return
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epc_syscall_return:
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{ .mmi
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alloc r31=ar.pfs,0,0,0,0
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add r14=32,sp
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add r15=16,sp
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;;
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}
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{ .mmi
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ld8 r31=[r15],24 // tf_length
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|
ld8 r16=[r14],16 // sp
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add sp=16,sp
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|
;;
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|
}
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{ .mmi
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ld8 r17=[r15],16 // unat (before)
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ld8 r18=[r14],16 // rp (syscall caller)
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add r31=r31,sp
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;;
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}
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{ .mmb
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ld8 r19=[r15],16 // pr
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ld8 r20=[r14],16 // pfs (syscall caller)
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nop 0
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;;
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}
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{ .mmi
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ld8 r21=[r15],24 // bspstore
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ld8 r22=[r14],24 // rnat
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mov pr=r19,0x1fffe
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;;
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}
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{ .mmb
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ld8 r23=[r15],16 // tp
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ld8 r24=[r14],16 // rsc
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nop 0
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;;
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}
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{ .mmi
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ld8 r25=[r15],16 // fpsr
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ld8 r26=[r14],16 // psr
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nop 0
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;;
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}
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|
{ .mmi
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ld8 gp=[r15],16 // gp
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ld8 r27=[r14],16 // ndirty
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|
tbit.z p14,p15=r26,34 // p14=ia64, p15=ia32
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;;
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|
}
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|
{ .mmi
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ld8 r28=[r15],56 // pfs (syscall stub)
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ld8 r29=[r14],56 // rp (syscall stub)
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shl r27=r27,16
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;;
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}
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{ .mmi
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ld8 r8=[r15],16 // r8
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mov ar.rsc=r27
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mov b6=r29
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|
;;
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|
}
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|
{ .mmb
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|
ld8 r9=[r14],40 // r9
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|
ld8 r10=[r15],40 // r10
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|
(p15) br.spnt epc_syscall_setup_ia32
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|
;;
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|
}
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|
{ .mmi
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|
loadrs
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|
mov ar.k7=r31
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mov sp=r16
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|
;;
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|
}
|
|
{ .mmi
|
|
mov r30=ar.bspstore
|
|
mov r14=ar.k5
|
|
mov ar.pfs=r28
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|
;;
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|
}
|
|
{ .mmi
|
|
mov ar.bspstore=r21
|
|
add r14=gw_ret-ia64_gateway_page,r14
|
|
dep r30=0,r30,0,13 // 8KB aligned.
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|
;;
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|
}
|
|
{ .mib
|
|
mov ar.k6=r30
|
|
mov r13=r23
|
|
nop 0
|
|
}
|
|
{ .mmi
|
|
mov psr.l=r26
|
|
mov ar.unat=r17
|
|
nop 0
|
|
;;
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|
}
|
|
{ .mib
|
|
srlz.d
|
|
mov b7=r14
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|
br.ret.sptk b7
|
|
;;
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|
}
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|
epc_syscall_setup_ia32:
|
|
{ .mmi
|
|
loadrs
|
|
mov ar.k7=r31
|
|
mov sp=r16
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|
;;
|
|
}
|
|
{ .mmi
|
|
mov r30=ar.bspstore
|
|
;;
|
|
mov ar.unat=r17
|
|
dep r30=0,r30,0,13 // 8KB aligned
|
|
;;
|
|
}
|
|
{ .mmi
|
|
mov ar.k6=r30
|
|
mov ar.bspstore=r21
|
|
mov r11=r0
|
|
;;
|
|
}
|
|
{ .mmi
|
|
ld8 r16=[r14],64
|
|
ld8 r17=[r15],80
|
|
mov r13=r0
|
|
;;
|
|
}
|
|
|
|
ld8 r24=[r14],32
|
|
ld8 r27=[r15],16
|
|
;;
|
|
ld8 r28=[r14],16
|
|
ld8 r29=[r15],16
|
|
;;
|
|
ld8 r30=[r14],40
|
|
ld8 r31=[r15],40
|
|
;;
|
|
|
|
{ .mmi
|
|
ld8 r2=[r14]
|
|
ld8 r3=[r15]
|
|
mov r14=r0
|
|
;;
|
|
}
|
|
{ .mmi
|
|
mov ar.csd=r2
|
|
mov ar.ssd=r3
|
|
mov r15=r0
|
|
;;
|
|
}
|
|
|
|
mov r2=ar.k5
|
|
mov psr.l=r26
|
|
;;
|
|
srlz.d
|
|
add r2=gw_ret_ia32-ia64_gateway_page,r2
|
|
;;
|
|
mov ar.rsc=0x0
|
|
mov b7=r2
|
|
br.ret.sptk b7
|
|
;;
|
|
END(epc_syscall)
|