305 lines
7.8 KiB
C
305 lines
7.8 KiB
C
/* $Id: os_bsd.c,v 1.13 2010/05/11 03:12:11 lcn Exp $ */
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* HighPoint RAID Driver for FreeBSD
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* Copyright (C) 2005-2011 HighPoint Technologies, Inc. All Rights Reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <dev/hptnr/hptnr_config.h>
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#include <dev/hptnr/os_bsd.h>
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BUS_ADDRESS get_dmapool_phy_addr(void *osext, void * dmapool_virt_addr);
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/* hardware access */
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HPT_U8 os_inb (void *port) { return inb((unsigned)(HPT_UPTR)port); }
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HPT_U16 os_inw (void *port) { return inw((unsigned)(HPT_UPTR)port); }
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HPT_U32 os_inl (void *port) { return inl((unsigned)(HPT_UPTR)port); }
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void os_outb (void *port, HPT_U8 value) { outb((unsigned)(HPT_UPTR)port, (value)); }
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void os_outw (void *port, HPT_U16 value) { outw((unsigned)(HPT_UPTR)port, (value)); }
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void os_outl (void *port, HPT_U32 value) { outl((unsigned)(HPT_UPTR)port, (value)); }
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void os_insw (void *port, HPT_U16 *buffer, HPT_U32 count)
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{ insw((unsigned)(HPT_UPTR)port, (void *)buffer, count); }
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void os_outsw(void *port, HPT_U16 *buffer, HPT_U32 count)
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{ outsw((unsigned)(HPT_UPTR)port, (void *)buffer, count); }
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HPT_U32 __dummy_reg = 0;
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/* PCI configuration space */
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HPT_U8 os_pci_readb (void *osext, HPT_U8 offset)
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{
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return pci_read_config(((PHBA)osext)->pcidev, offset, 1);
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}
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HPT_U16 os_pci_readw (void *osext, HPT_U8 offset)
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{
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return pci_read_config(((PHBA)osext)->pcidev, offset, 2);
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}
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HPT_U32 os_pci_readl (void *osext, HPT_U8 offset)
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{
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return pci_read_config(((PHBA)osext)->pcidev, offset, 4);
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}
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void os_pci_writeb (void *osext, HPT_U8 offset, HPT_U8 value)
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{
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pci_write_config(((PHBA)osext)->pcidev, offset, value, 1);
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}
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void os_pci_writew (void *osext, HPT_U8 offset, HPT_U16 value)
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{
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pci_write_config(((PHBA)osext)->pcidev, offset, value, 2);
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}
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void os_pci_writel (void *osext, HPT_U8 offset, HPT_U32 value)
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{
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pci_write_config(((PHBA)osext)->pcidev, offset, value, 4);
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}
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BUS_ADDRESS get_dmapool_phy_addr(void *osext, void * dmapool_virt_addr)
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{
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return (BUS_ADDRESS)vtophys(dmapool_virt_addr);
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}
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HPT_U32 pcicfg_read_dword(HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg)
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{
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return (HPT_U32)pci_cfgregread(bus, dev, func, reg, 4);
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}/* PCI space access */
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void *os_map_pci_bar(
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void *osext,
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int index,
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HPT_U32 offset,
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HPT_U32 length
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)
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{
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PHBA hba = (PHBA)osext;
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HPT_U32 base;
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hba->pcibar[index].rid = 0x10 + index * 4;
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base = pci_read_config(hba->pcidev, hba->pcibar[index].rid, 4);
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if (base & 1) {
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hba->pcibar[index].type = SYS_RES_IOPORT;
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hba->pcibar[index].res = bus_alloc_resource_any(hba->pcidev,
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hba->pcibar[index].type, &hba->pcibar[index].rid, RF_ACTIVE);
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hba->pcibar[index].base = (void *)(unsigned long)(base & ~0x1);
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} else {
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hba->pcibar[index].type = SYS_RES_MEMORY;
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hba->pcibar[index].res = bus_alloc_resource_any(hba->pcidev,
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hba->pcibar[index].type, &hba->pcibar[index].rid, RF_ACTIVE);
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hba->pcibar[index].base = (char *)rman_get_virtual(hba->pcibar[index].res) + offset;
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}
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return hba->pcibar[index].base;
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}
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void os_unmap_pci_bar(void *osext, void *base)
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{
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PHBA hba = (PHBA)osext;
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int index;
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for (index=0; index<6; index++) {
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if (hba->pcibar[index].base==base) {
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bus_release_resource(hba->pcidev, hba->pcibar[index].type,
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hba->pcibar[index].rid, hba->pcibar[index].res);
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hba->pcibar[index].base = 0;
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return;
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}
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}
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}
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void freelist_reserve(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT count)
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{
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PVBUS_EXT vbus_ext = osext;
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if (vbus_ext->ext_type!=EXT_TYPE_VBUS)
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vbus_ext = ((PHBA)osext)->vbus_ext;
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list->next = vbus_ext->freelist_head;
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vbus_ext->freelist_head = list;
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list->dma = 0;
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list->size = size;
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list->head = 0;
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#if DBG
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list->reserved_count =
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#endif
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list->count = count;
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}
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void *freelist_get(struct freelist *list)
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{
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void * result;
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if (list->count) {
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HPT_ASSERT(list->head);
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result = list->head;
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list->head = *(void **)result;
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list->count--;
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return result;
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}
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return 0;
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}
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void freelist_put(struct freelist * list, void *p)
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{
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HPT_ASSERT(list->dma==0);
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list->count++;
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*(void **)p = list->head;
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list->head = p;
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}
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void freelist_reserve_dma(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT alignment, HPT_UINT count)
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{
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PVBUS_EXT vbus_ext = osext;
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if (vbus_ext->ext_type!=EXT_TYPE_VBUS)
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vbus_ext = ((PHBA)osext)->vbus_ext;
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list->next = vbus_ext->freelist_dma_head;
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vbus_ext->freelist_dma_head = list;
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list->dma = 1;
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list->alignment = alignment;
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list->size = size;
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list->head = 0;
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#if DBG
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list->reserved_count =
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#endif
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list->count = count;
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}
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void *freelist_get_dma(struct freelist *list, BUS_ADDRESS *busaddr)
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{
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void *result;
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HPT_ASSERT(list->dma);
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result = freelist_get(list);
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if (result)
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*busaddr = *(BUS_ADDRESS *)((void **)result+1);
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return result;
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}
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void freelist_put_dma(struct freelist *list, void *p, BUS_ADDRESS busaddr)
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{
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HPT_ASSERT(list->dma);
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list->count++;
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*(void **)p = list->head;
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*(BUS_ADDRESS *)((void **)p+1) = busaddr;
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list->head = p;
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}
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HPT_U32 os_get_stamp(void)
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{
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HPT_U32 stamp;
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do { stamp = random(); } while (stamp==0);
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return stamp;
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}
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void os_stallexec(HPT_U32 microseconds)
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{
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DELAY(microseconds);
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}
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static void os_timer_for_ldm(void *arg)
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{
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PVBUS_EXT vbus_ext = (PVBUS_EXT)arg;
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ldm_on_timer((PVBUS)vbus_ext->vbus);
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}
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void os_request_timer(void * osext, HPT_U32 interval)
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{
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PVBUS_EXT vbus_ext = osext;
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HPT_ASSERT(vbus_ext->ext_type==EXT_TYPE_VBUS);
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callout_reset_sbt(&vbus_ext->timer, SBT_1US * interval, 0,
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os_timer_for_ldm, vbus_ext, 0);
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}
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HPT_TIME os_query_time(void)
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{
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return ticks * (1000000 / hz);
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}
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void os_schedule_task(void *osext, OSM_TASK *task)
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{
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PVBUS_EXT vbus_ext = osext;
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HPT_ASSERT(task->next==0);
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if (vbus_ext->tasks==0)
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vbus_ext->tasks = task;
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else {
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OSM_TASK *t = vbus_ext->tasks;
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while (t->next) t = t->next;
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t->next = task;
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}
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if (vbus_ext->worker.ta_context)
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TASK_ENQUEUE(&vbus_ext->worker);
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}
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int os_revalidate_device(void *osext, int id)
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{
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return 0;
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}
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int os_query_remove_device(void *osext, int id)
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{
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return 0;
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}
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HPT_U8 os_get_vbus_seq(void *osext)
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{
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return ((PVBUS_EXT)osext)->sim->path_id;
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}
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int os_printk(char *fmt, ...)
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{
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va_list args;
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static char buf[512];
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va_start(args, fmt);
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vsnprintf(buf, sizeof(buf), fmt, args);
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va_end(args);
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return printf("%s: %s\n", driver_name, buf);
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}
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#if DBG
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void os_check_stack(const char *location, int size){}
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void __os_dbgbreak(const char *file, int line)
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{
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printf("*** break at %s:%d ***", file, line);
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while (1);
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}
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int hpt_dbg_level = 1;
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#endif
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