d4fb0c0a56
flip them so that times in the 20:00:00 to 23:59:59 range read correctly. Reported by: Dr. Rolf Jansen <freebsd-rj@obsigna.com> Pointy hat: ian@
82 lines
2.9 KiB
C
82 lines
2.9 KiB
C
/*-
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* Copyright (c) 2014-2015 Luiz Otavio O Souza <loos@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Maxim DS3231 RTC registers.
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*/
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#ifndef _DS3231REG_H_
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#define _DS3231REG_H_
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#define DS3231_SECS 0x00
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#define DS3231_SECS_MASK 0x7f
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#define DS3231_MINS 0x01
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#define DS3231_MINS_MASK 0x7f
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#define DS3231_HOUR 0x02
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#define DS3231_HOUR_MASK_12HR 0x1f
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#define DS3231_HOUR_MASK_24HR 0x3f
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#define DS3231_HOUR_IS_PM 0x20
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#define DS3231_HOUR_USE_AMPM 0x40
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#define DS3231_WEEKDAY 0x03
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#define DS3231_WEEKDAY_MASK 0x07
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#define DS3231_DATE 0x04
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#define DS3231_DATE_MASK 0x3f
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#define DS3231_MONTH 0x05
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#define DS3231_MONTH_MASK 0x1f
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#define DS3231_C_MASK 0x80
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#define DS3231_YEAR 0x06
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#define DS3231_YEAR_MASK 0xff
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#define DS3231_CONTROL 0x0e
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#define DS3231_CTRL_EOSC (1 << 7)
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#define DS3231_CTRL_BBSQW (1 << 6)
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#define DS3231_CTRL_CONV (1 << 5)
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#define DS3231_CTRL_RS2 (1 << 4)
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#define DS3231_CTRL_RS1 (1 << 3)
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#define DS3231_CTRL_RS_MASK (DS3231_CTRL_RS2 | DS3231_CTRL_RS1)
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#define DS3231_CTRL_RS_SHIFT 3
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#define DS3231_CTRL_INTCN (1 << 2)
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#define DS3231_CTRL_A2IE (1 << 1)
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#define DS3231_CTRL_A1IE (1 << 0)
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#define DS3231_CTRL_MASK \
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(DS3231_CTRL_EOSC | DS3231_CTRL_A1IE | DS3231_CTRL_A2IE)
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#define DS3231_STATUS 0x0f
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#define DS3231_STATUS_OSF (1 << 7)
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#define DS3231_STATUS_EN32KHZ (1 << 3)
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#define DS3231_STATUS_BUSY (1 << 2)
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#define DS3231_STATUS_A2F (1 << 1)
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#define DS3231_STATUS_A1F (1 << 0)
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#define DS3231_TEMP 0x11
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#define DS3231_TEMP_MASK 0xffc0
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#define DS3231_0500C 0x80
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#define DS3231_0250C 0x40
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#define DS3231_MSB 0x8000
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#define DS3231_NEG_BIT DS3231_MSB
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#define TZ_ZEROC 2731
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#endif /* _DS3231REG_H_ */
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