Justin Hibbits 5ab39b6552 On POWER9 clear the HID0_RADIX before enabling the page tables ... POWER9 supports Radix page tables in addition to Hashed page tables. When Radix page tables are in use, the TLB is cut in half, so that half of the TLB is used for the page walk cache. This is the default behavior, however FreeBSD currently does not support Radix tables. Clear this bit so that we can use the full TLB. Do this in the MMU logic so that configuration can be localized to the specific translation format. Once we do support Radix tables, the setup for that will be localized to the Radix MMU kobj.		2018-05-26 04:33:19 +00:00
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aim_machdep.c	Add hypervisor trap handling, using HSRR0/HSRR1	2018-05-19 04:21:50 +00:00
locore32.S	Rename assym.s to assym.inc	2018-03-20 17:58:51 +00:00
locore64.S	Rename assym.s to assym.inc	2018-03-20 17:58:51 +00:00
locore.S	Add a kdb show command to print arbitrary SPRs on PowerPC	2016-08-13 18:46:49 +00:00
mmu_oea64.c	Final fix for alignment issues with the page table first patched with	2018-05-14 04:00:52 +00:00
mmu_oea64.h	Final fix for alignment issues with the page table first patched with	2018-05-14 04:00:52 +00:00
mmu_oea.c	vm_wait() rework.	2018-02-20 10:13:13 +00:00
moea64_if.m	New pmap implementation for 64-bit PowerPC processors. The main focus of	2015-02-24 21:37:20 +00:00
moea64_native.c	On POWER9 clear the HID0_RADIX before enabling the page tables	2018-05-26 04:33:19 +00:00
mp_cpudep.c	Add support for the XIVE XICS emulation mode for POWER9 systems	2018-05-20 03:23:17 +00:00
slb.c	Move the powerpc64 direct map base address from zero to high memory. This	2018-03-07 17:08:07 +00:00
trap_subr32.S	Use the explicit expanded form of cmp.	2017-01-18 03:42:21 +00:00
trap_subr64.S	Add hypervisor trap handling, using HSRR0/HSRR1	2018-05-19 04:21:50 +00:00