235 lines
9.8 KiB
C
235 lines
9.8 KiB
C
/* radeon.h -- ATI Radeon DRM template customization -*- linux-c -*-
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* Created: Wed Feb 14 17:07:34 2001 by gareth@valinux.com
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*
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Gareth Hughes <gareth@valinux.com>
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* Keith Whitwell <keith@tungstengraphics.com>
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*
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* $FreeBSD$
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*/
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#ifndef __RADEON_H__
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#define __RADEON_H__
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/* This remains constant for all DRM template files.
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*/
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#define DRM(x) radeon_##x
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/* General customization:
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*/
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#define __HAVE_AGP 1
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#define __MUST_HAVE_AGP 0
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#define __HAVE_MTRR 1
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#define __HAVE_CTX_BITMAP 1
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#define __HAVE_SG 1
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#define __HAVE_PCI_DMA 1
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#define DRIVER_AUTHOR "Gareth Hughes, Keith Whitwell, others."
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#define DRIVER_NAME "radeon"
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#define DRIVER_DESC "ATI Radeon"
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#define DRIVER_DATE "20020828"
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#define DRIVER_MAJOR 1
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#define DRIVER_MINOR 10
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#define DRIVER_PATCHLEVEL 0
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/* Interface history:
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*
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* 1.1 - ??
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* 1.2 - Add vertex2 ioctl (keith)
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* - Add stencil capability to clear ioctl (gareth, keith)
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* - Increase MAX_TEXTURE_LEVELS (brian)
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* 1.3 - Add cmdbuf ioctl (keith)
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* - Add support for new radeon packets (keith)
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* - Add getparam ioctl (keith)
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* - Add flip-buffers ioctl, deprecate fullscreen foo (keith).
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* 1.4 - Add scratch registers to get_param ioctl.
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* 1.5 - Add r200 packets to cmdbuf ioctl
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* - Add r200 function to init ioctl
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* - Add 'scalar2' instruction to cmdbuf
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* 1.6 - Add static GART memory manager
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* Add irq handler (won't be turned on unless X server knows to)
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* Add irq ioctls and irq_active getparam.
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* Add wait command for cmdbuf ioctl
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* Add GART offset query for getparam
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* 1.7 - Add support for cube map registers: R200_PP_CUBIC_FACES_[0..5]
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* and R200_PP_CUBIC_OFFSET_F1_[0..5].
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* Added packets R200_EMIT_PP_CUBIC_FACES_[0..5] and
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* R200_EMIT_PP_CUBIC_OFFSETS_[0..5]. (brian)
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* 1.8 - Remove need to call cleanup ioctls on last client exit (keith)
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* Add 'GET' queries for starting additional clients on different VT's.
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* 1.9 - Add DRM_IOCTL_RADEON_CP_RESUME ioctl.
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* Add texture rectangle support for r100.
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* 1.10- Add SETPARAM ioctl; first parameter to set is FB_LOCATION, which
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* clients use to tell the DRM where they think the framebuffer is
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* located in the card's address space
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*/
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#define DRIVER_IOCTLS \
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[DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { radeon_cp_buffers, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_INIT)] = { radeon_cp_init, 1, 1 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_START)] = { radeon_cp_start, 1, 1 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_STOP)] = { radeon_cp_stop, 1, 1 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESET)] = { radeon_cp_reset, 1, 1 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_IDLE)] = { radeon_cp_idle, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESUME)] = { radeon_cp_resume, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_RESET)] = { radeon_engine_reset, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_FULLSCREEN)] = { radeon_fullscreen, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_SWAP)] = { radeon_cp_swap, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_CLEAR)] = { radeon_cp_clear, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX)] = { radeon_cp_vertex, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDICES)] = { radeon_cp_indices, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_TEXTURE)] = { radeon_cp_texture, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_STIPPLE)] = { radeon_cp_stipple, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDIRECT)] = { radeon_cp_indirect, 1, 1 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX2)] = { radeon_cp_vertex2, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_CMDBUF)] = { radeon_cp_cmdbuf, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_GETPARAM)] = { radeon_cp_getparam, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_FLIP)] = { radeon_cp_flip, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_ALLOC)] = { radeon_mem_alloc, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_FREE)] = { radeon_mem_free, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_INIT_HEAP)] = { radeon_mem_init_heap, 1, 1 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_EMIT)] = { radeon_irq_emit, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_WAIT)] = { radeon_irq_wait, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_RADEON_SETPARAM)] = { radeon_cp_setparam, 1, 0 }, \
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#define DRIVER_PCI_IDS \
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{0x1002, 0x4136, 0, "ATI Radeon RS100 IGP 320M"}, \
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{0x1002, 0x4137, 0, "ATI Radeon RS200 IGP"}, \
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{0x1002, 0x4237, 0, "ATI Radeon RS250 IGP"}, \
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{0x1002, 0x4242, 0, "ATI Radeon BB R200 AIW 8500DV"}, \
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{0x1002, 0x4242, 0, "ATI Radeon BC R200"}, \
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{0x1002, 0x4336, 0, "ATI Radeon RS100 Mobility U1"}, \
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{0x1002, 0x4337, 0, "ATI Radeon RS200 Mobility IGP 340M"}, \
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{0x1002, 0x4437, 0, "ATI Radeon RS250 Mobility IGP"}, \
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{0x1002, 0x4964, 0, "ATI Radeon Id R250 9000"}, \
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{0x1002, 0x4965, 0, "ATI Radeon Ie R250 9000"}, \
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{0x1002, 0x4966, 0, "ATI Radeon If R250 9000"}, \
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{0x1002, 0x4967, 0, "ATI Radeon Ig R250 9000"}, \
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{0x1002, 0x4C57, 0, "ATI Radeon LW Mobility 7500 M7"}, \
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{0x1002, 0x4C58, 0, "ATI Radeon LX RV200 Mobility FireGL 7800 M7"}, \
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{0x1002, 0x4C59, 0, "ATI Radeon LY Mobility M6"}, \
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{0x1002, 0x4C5A, 0, "ATI Radeon LZ Mobility M6"}, \
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{0x1002, 0x4C64, 0, "ATI Radeon Ld R250 Mobility 9000 M9"}, \
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{0x1002, 0x4C65, 0, "ATI Radeon Le R250 Mobility 9000 M9"}, \
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{0x1002, 0x4C66, 0, "ATI Radeon Lf R250 Mobility 9000 M9"}, \
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{0x1002, 0x4C67, 0, "ATI Radeon Lg R250 Mobility 9000 M9"}, \
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{0x1002, 0x5144, 0, "ATI Radeon QD R100"}, \
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{0x1002, 0x5145, 0, "ATI Radeon QE R100"}, \
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{0x1002, 0x5146, 0, "ATI Radeon QF R100"}, \
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{0x1002, 0x5147, 0, "ATI Radeon QG R100"}, \
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{0x1002, 0x5148, 0, "ATI Radeon QH R200 8500"}, \
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{0x1002, 0x5149, 0, "ATI Radeon QI R200"}, \
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{0x1002, 0x514A, 0, "ATI Radeon QJ R200"}, \
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{0x1002, 0x514B, 0, "ATI Radeon QK R200"}, \
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{0x1002, 0x514C, 0, "ATI Radeon QL R200 8500 LE"}, \
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{0x1002, 0x514D, 0, "ATI Radeon QM R200 9100"}, \
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{0x1002, 0x514E, 0, "ATI Radeon QN R200 8500 LE"}, \
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{0x1002, 0x514F, 0, "ATI Radeon QO R200 8500 LE"}, \
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{0x1002, 0x5157, 0, "ATI Radeon QW RV200 7500"}, \
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{0x1002, 0x5158, 0, "ATI Radeon QX RV200 7500"}, \
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{0x1002, 0x5159, 0, "ATI Radeon QY RV100 7000/VE"}, \
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{0x1002, 0x515A, 0, "ATI Radeon QZ RV100 7000/VE"}, \
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{0x1002, 0x5168, 0, "ATI Radeon Qh R200"}, \
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{0x1002, 0x5169, 0, "ATI Radeon Qi R200"}, \
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{0x1002, 0x516A, 0, "ATI Radeon Qj R200"}, \
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{0x1002, 0x516B, 0, "ATI Radeon Qk R200"}, \
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{0x1002, 0x516C, 0, "ATI Radeon Ql R200"}, \
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{0x1002, 0x5834, 0, "ATI Radeon RS300 IGP"}, \
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{0x1002, 0x5835, 0, "ATI Radeon RS300 Mobility IGP"}, \
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{0x1002, 0x5836, 0, "ATI Radeon RS300 IGP"}, \
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{0x1002, 0x5837, 0, "ATI Radeon RS300 IGP"}, \
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{0x1002, 0x5960, 0, "ATI Radeon RV280 9200"}, \
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{0x1002, 0x5961, 0, "ATI Radeon RV280 9200 SE"}, \
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{0x1002, 0x5962, 0, "ATI Radeon RV280 9200"}, \
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{0x1002, 0x5963, 0, "ATI Radeon RV280 9200"}, \
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{0x1002, 0x5964, 0, "ATI Radeon RV280 9200 SE"}, \
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{0x1002, 0x5968, 0, "ATI Radeon RV280 9200"}, \
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{0x1002, 0x5969, 0, "ATI Radeon RV280 9200"}, \
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{0x1002, 0x596A, 0, "ATI Radeon RV280 9200"}, \
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{0x1002, 0x596B, 0, "ATI Radeon RV280 9200"}, \
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{0x1002, 0x5c61, 0, "ATI Radeon RV280 Mobility"}, \
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{0x1002, 0x5c62, 0, "ATI Radeon RV280"}, \
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{0x1002, 0x5c63, 0, "ATI Radeon RV280 Mobility"}, \
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{0x1002, 0x5c64, 0, "ATI Radeon RV280"}, \
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{0, 0, 0, NULL}
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#define DRIVER_FILE_FIELDS \
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int64_t radeon_fb_delta; \
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#define DRIVER_OPEN_HELPER( filp_priv, dev ) \
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do { \
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drm_radeon_private_t *dev_priv = dev->dev_private; \
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if ( dev_priv ) \
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filp_priv->radeon_fb_delta = dev_priv->fb_location; \
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else \
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filp_priv->radeon_fb_delta = 0; \
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} while( 0 )
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/* When a client dies:
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* - Check for and clean up flipped page state
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* - Free any alloced GART memory.
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*
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* DRM infrastructure takes care of reclaiming dma buffers.
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*/
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#define DRIVER_PRERELEASE() \
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do { \
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if ( dev->dev_private ) { \
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drm_radeon_private_t *dev_priv = dev->dev_private; \
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if ( dev_priv->page_flipping ) { \
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radeon_do_cleanup_pageflip( dev ); \
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} \
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radeon_mem_release( filp, dev_priv->gart_heap ); \
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radeon_mem_release( filp, dev_priv->fb_heap ); \
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} \
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} while (0)
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/* When the last client dies, shut down the CP and free dev->dev_priv.
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*/
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/* #define __HAVE_RELEASE 1 */
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#define DRIVER_PRETAKEDOWN() \
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do { \
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radeon_do_release( dev ); \
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} while (0)
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/* DMA customization:
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*/
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#define __HAVE_DMA 1
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#define __HAVE_IRQ 1
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#define __HAVE_VBL_IRQ 1
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#define __HAVE_SHARED_IRQ 1
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/* Buffer customization:
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*/
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#define DRIVER_BUF_PRIV_T drm_radeon_buf_priv_t
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#define DRIVER_AGP_BUFFERS_MAP( dev ) \
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((drm_radeon_private_t *)((dev)->dev_private))->buffers
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#endif
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