0019917542
cache after a data access error we must discard all cache lines. When disabled existing cache lines are not invalidated by stores to memory, so we risk reading stale data that was cached before the data access error if we don't flush them. This is especially fatal when the memory involved is the active part of the kernel or user stack. For good measure we also flush the instruction cache. This fixes random crashes when the X server probes the PCI bus through /dev/pci.
95 lines
2.5 KiB
C
95 lines
2.5 KiB
C
/*-
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* Copyright (c) 2003 Jake Burkholder.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_pmap.h"
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#include <sys/param.h>
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#include <sys/linker_set.h>
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#include <sys/proc.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/smp.h>
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#include <sys/sysctl.h>
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#include <sys/systm.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/cache.h>
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#include <machine/cpufunc.h>
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#include <machine/smp.h>
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#include <machine/tlb.h>
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/*
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* Enable level 1 caches.
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*/
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void
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cheetah_cache_enable(void)
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{
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}
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/*
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* Flush all lines from the level 1 caches.
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*/
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void
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cheetah_cache_flush(void)
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{
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}
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/*
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* Flush a physical page from the data cache.
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*/
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void
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cheetah_dcache_page_inval(vm_paddr_t spa)
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{
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vm_paddr_t pa;
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void *cookie;
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KASSERT((spa & PAGE_MASK) == 0,
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("dcache_page_inval: pa not page aligned"));
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cookie = ipi_dcache_page_inval(tl_ipi_cheetah_dcache_page_inval, spa);
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for (pa = spa; pa < spa + PAGE_SIZE; pa += cache.dc_linesize)
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stxa_sync(pa, ASI_DCACHE_INVALIDATE, 0);
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ipi_wait(cookie);
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}
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/*
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* Flush a physical page from the intsruction cache. Instruction cache
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* consistency is maintained by hardware.
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*/
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void
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cheetah_icache_page_inval(vm_paddr_t pa)
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{
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}
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void
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cheetah_tlb_flush_user(void)
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{
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panic("cheetah_tlb_flush_user");
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}
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