e92a1350b5
Intel now provides comprehensive tables for all performance counters and the various valid configuration permutations as text .json files. Libpmc has been converted to use these and hwpmc_core has been greatly simplified by moving to passthrough of the table values. The one gotcha is that said tables don't support pentium pro and and pentium IV. There's very few users of hwpmc on _amd64_ kernels on new hardware. It is unlikely that anyone is doing low level optimization on 15 year old Intel hardware. Nonetheless, if someone feels strongly enough to populate the corresponding tables for p4 and ppro I will reinstate the files in to the build. Code for the K8 counters and !x86 architectures remains unchanged.
128 lines
3.3 KiB
C
128 lines
3.3 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2010 Fabien Thomas
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _DEV_HWPMC_UNCORE_H_
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#define _DEV_HWPMC_UNCORE_H_ 1
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/*
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* Fixed-function PMCs.
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*/
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struct pmc_md_ucf_op_pmcallocate {
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uint16_t pm_ucf_flags; /* additional flags */
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};
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#define UCF_EN 0x1
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#define UCF_PMI 0x4
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/*
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* Programmable PMCs.
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*/
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struct pmc_md_ucp_op_pmcallocate {
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uint32_t pm_ucp_config;
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};
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#define UCP_EVSEL(C) ((C) & 0xFF)
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#define UCP_UMASK(C) ((C) & 0xFF00)
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#define UCP_CTRR (1 << 17)
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#define UCP_EDGE (1 << 18)
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#define UCP_INT (1 << 20)
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#define UCP_EN (1 << 22)
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#define UCP_INV (1 << 23)
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#define UCP_CMASK(C) (((C) & 0xFF) << 24)
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#ifdef _KERNEL
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#define DCTL_FLAG_UNC_PMI (1ULL << 13)
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/*
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* Fixed-function counters.
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*/
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#define UCF_MASK 0xF
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#define UCF_CTR0 0x394
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#define UCF_OFFSET 32
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#define UCF_OFFSET_SB 29
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#define UCF_CTRL 0x395
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/*
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* Programmable counters.
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*/
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#define UCP_PMC0 0x3B0
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#define UCP_EVSEL0 0x3C0
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#define UCP_OPCODE_MATCH 0x396
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#define UCP_CB0_EVSEL0 0x700
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/*
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* Simplified programming interface in Intel Performance Architecture
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* v2 and later.
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*/
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#define UC_GLOBAL_STATUS 0x392
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#define UC_GLOBAL_CTRL 0x391
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#define UC_GLOBAL_OVF_CTRL 0x393
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#define UC_GLOBAL_STATUS_FLAG_CLRCHG (1ULL << 63)
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#define UC_GLOBAL_STATUS_FLAG_OVFPMI (1ULL << 61)
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#define UC_GLOBAL_CTRL_FLAG_FRZ (1ULL << 63)
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#define UC_GLOBAL_CTRL_FLAG_ENPMICORE0 (1ULL << 48)
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/*
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* Model specific registers.
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*/
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#define MSR_GQ_SNOOP_MESF 0x301
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struct pmc_md_ucf_pmc {
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uint64_t pm_ucf_ctrl;
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};
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struct pmc_md_ucp_pmc {
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uint32_t pm_ucp_evsel;
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};
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/*
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* Prototypes.
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*/
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int pmc_uncore_initialize(struct pmc_mdep *_md, int _maxcpu);
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void pmc_uncore_finalize(struct pmc_mdep *_md);
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int pmc_ucf_initialize(struct pmc_mdep *_md, int _maxcpu, int _npmc, int _width);
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void pmc_ucf_finalize(struct pmc_mdep *_md);
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int pmc_ucp_initialize(struct pmc_mdep *_md, int _maxcpu, int _npmc, int _width,
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int _flags);
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void pmc_ucp_finalize(struct pmc_mdep *_md);
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#endif /* _KERNEL */
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#endif /* _DEV_HWPMC_UNCORE_H */
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